blob: 7480edae85edb46149110a9ab75afa57081efaa9 [file] [log] [blame]
Kim Phillips1b9a93e2006-08-29 18:13:31 -05001/*
2 * MPC8349E MDS Device Tree Source
3 *
4 * Copyright 2005, 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
Paul Gortmakereedd62e2008-01-25 01:22:09 -050012/dts-v1/;
13
Kim Phillips1b9a93e2006-08-29 18:13:31 -050014/ {
15 model = "MPC8349EMDS";
Kumar Galad71a1dc62007-02-16 09:57:22 -060016 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
Kim Phillips1b9a93e2006-08-29 18:13:31 -050017 #address-cells = <1>;
18 #size-cells = <1>;
19
Kumar Galaea082fa2007-12-12 01:46:12 -060020 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 };
28
Kim Phillips1b9a93e2006-08-29 18:13:31 -050029 cpus {
Kim Phillips1b9a93e2006-08-29 18:13:31 -050030 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8349@0 {
34 device_type = "cpu";
Paul Gortmakercda13dd2008-01-28 16:09:36 -050035 reg = <0x0>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -050036 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050040 timebase-frequency = <0>; // from bootloader
41 bus-frequency = <0>; // from bootloader
42 clock-frequency = <0>; // from bootloader
Kim Phillips1b9a93e2006-08-29 18:13:31 -050043 };
44 };
45
46 memory {
47 device_type = "memory";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050048 reg = <0x00000000 0x10000000>; // 256MB at 0
Kim Phillips1b9a93e2006-08-29 18:13:31 -050049 };
50
Li Yangea5b7a62007-02-07 13:51:09 +080051 bcsr@e2400000 {
52 device_type = "board-control";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050053 reg = <0xe2400000 0x8000>;
Li Yangea5b7a62007-02-07 13:51:09 +080054 };
55
Kim Phillips1b9a93e2006-08-29 18:13:31 -050056 soc8349@e0000000 {
57 #address-cells = <1>;
58 #size-cells = <1>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050059 device_type = "soc";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050060 ranges = <0x0 0xe0000000 0x00100000>;
61 reg = <0xe0000000 0x00000200>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050062 bus-frequency = <0>;
63
64 wdt@200 {
65 device_type = "watchdog";
66 compatible = "mpc83xx_wdt";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050067 reg = <0x200 0x100>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050068 };
69
70 i2c@3000 {
Kim Phillips27f498072007-11-08 13:37:06 -060071 #address-cells = <1>;
72 #size-cells = <0>;
Kumar Galaec9686c2007-12-11 23:17:24 -060073 cell-index = <0>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050074 compatible = "fsl-i2c";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050075 reg = <0x3000 0x100>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -050076 interrupts = <14 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -050077 interrupt-parent = <&ipic>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050078 dfsrr;
Kim Phillips27f498072007-11-08 13:37:06 -060079
80 rtc@68 {
81 compatible = "dallas,ds1374";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050082 reg = <0x68>;
Kim Phillips27f498072007-11-08 13:37:06 -060083 };
Kim Phillips1b9a93e2006-08-29 18:13:31 -050084 };
85
86 i2c@3100 {
Kim Phillips27f498072007-11-08 13:37:06 -060087 #address-cells = <1>;
88 #size-cells = <0>;
Kumar Galaec9686c2007-12-11 23:17:24 -060089 cell-index = <1>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050090 compatible = "fsl-i2c";
Paul Gortmakereedd62e2008-01-25 01:22:09 -050091 reg = <0x3100 0x100>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -050092 interrupts = <15 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -050093 interrupt-parent = <&ipic>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -050094 dfsrr;
95 };
96
97 spi@7000 {
Anton Vorontsovf3a2b292008-01-24 18:40:07 +030098 cell-index = <0>;
99 compatible = "fsl,spi";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500100 reg = <0x7000 0x1000>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500101 interrupts = <16 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500102 interrupt-parent = <&ipic>;
Peter Korsgaard33799e32007-10-03 17:44:58 +0200103 mode = "cpu";
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500104 };
105
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500106 /* phy type (ULPI or SERIAL) are only types supported for MPH */
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500107 /* port = 0 or 1 */
108 usb@22000 {
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500109 compatible = "fsl-usb2-mph";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500110 reg = <0x22000 0x1000>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500111 #address-cells = <1>;
112 #size-cells = <0>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500113 interrupt-parent = <&ipic>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500114 interrupts = <39 0x8>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500115 phy_type = "ulpi";
116 port1;
117 };
118 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
119 usb@23000 {
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500120 compatible = "fsl-usb2-dr";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500121 reg = <0x23000 0x1000>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500122 #address-cells = <1>;
123 #size-cells = <0>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500124 interrupt-parent = <&ipic>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500125 interrupts = <38 0x8>;
Li Yangea5b7a62007-02-07 13:51:09 +0800126 dr_mode = "otg";
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500127 phy_type = "ulpi";
128 };
129
130 mdio@24520 {
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500131 #address-cells = <1>;
132 #size-cells = <0>;
Kumar Galae77b28e2007-12-12 00:28:35 -0600133 compatible = "fsl,gianfar-mdio";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500134 reg = <0x24520 0x20>;
Kumar Galae77b28e2007-12-12 00:28:35 -0600135
Kumar Galad71a1dc62007-02-16 09:57:22 -0600136 phy0: ethernet-phy@0 {
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500137 interrupt-parent = <&ipic>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500138 interrupts = <17 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500139 reg = <0x0>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500140 device_type = "ethernet-phy";
141 };
Kumar Galad71a1dc62007-02-16 09:57:22 -0600142 phy1: ethernet-phy@1 {
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500143 interrupt-parent = <&ipic>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500144 interrupts = <18 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500145 reg = <0x1>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500146 device_type = "ethernet-phy";
147 };
148 };
149
Kumar Galae77b28e2007-12-12 00:28:35 -0600150 enet0: ethernet@24000 {
151 cell-index = <0>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500152 device_type = "network";
153 model = "TSEC";
154 compatible = "gianfar";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500155 reg = <0x24000 0x1000>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500156 local-mac-address = [ 00 00 00 00 00 00 ];
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500157 interrupts = <32 0x8 33 0x8 34 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500158 interrupt-parent = <&ipic>;
159 phy-handle = <&phy0>;
Grant Likelyad25a4c2007-08-31 06:26:24 +1000160 linux,network-index = <0>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500161 };
162
Kumar Galae77b28e2007-12-12 00:28:35 -0600163 enet1: ethernet@25000 {
164 cell-index = <1>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500165 device_type = "network";
166 model = "TSEC";
167 compatible = "gianfar";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500168 reg = <0x25000 0x1000>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500169 local-mac-address = [ 00 00 00 00 00 00 ];
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500170 interrupts = <35 0x8 36 0x8 37 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500171 interrupt-parent = <&ipic>;
172 phy-handle = <&phy1>;
Grant Likelyad25a4c2007-08-31 06:26:24 +1000173 linux,network-index = <1>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500174 };
175
Kumar Galaea082fa2007-12-12 01:46:12 -0600176 serial0: serial@4500 {
177 cell-index = <0>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500178 device_type = "serial";
179 compatible = "ns16550";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500180 reg = <0x4500 0x100>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500181 clock-frequency = <0>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500182 interrupts = <9 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500183 interrupt-parent = <&ipic>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500184 };
185
Kumar Galaea082fa2007-12-12 01:46:12 -0600186 serial1: serial@4600 {
187 cell-index = <1>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500188 device_type = "serial";
189 compatible = "ns16550";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500190 reg = <0x4600 0x100>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500191 clock-frequency = <0>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500192 interrupts = <10 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500193 interrupt-parent = <&ipic>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500194 };
195
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500196 /* May need to remove if on a part without crypto engine */
197 crypto@30000 {
198 device_type = "crypto";
199 model = "SEC2";
200 compatible = "talitos";
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500201 reg = <0x30000 0x10000>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500202 interrupts = <11 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500203 interrupt-parent = <&ipic>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500204 num-channels = <4>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500205 channel-fifo-len = <24>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500206 exec-units-mask = <0x0000007e>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500207 /* desc mask is for rev2.0,
208 * we need runtime fixup for >2.0 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500209 descriptor-types-mask = <0x01010ebf>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500210 };
211
212 /* IPIC
213 * interrupts cell = <intr #, sense>
214 * sense values match linux IORESOURCE_IRQ_* defines:
215 * sense == 8: Level, low assertion
216 * sense == 2: Edge, high-to-low change
217 */
Kumar Galad71a1dc62007-02-16 09:57:22 -0600218 ipic: pic@700 {
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500219 interrupt-controller;
220 #address-cells = <0>;
221 #interrupt-cells = <2>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500222 reg = <0x700 0x100>;
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500223 device_type = "ipic";
224 };
225 };
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500226
Kumar Galaea082fa2007-12-12 01:46:12 -0600227 pci0: pci@e0008500 {
228 cell-index = <1>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500229 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500230 interrupt-map = <
231
232 /* IDSEL 0x11 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500233 0x8800 0x0 0x0 0x1 &ipic 20 0x8
234 0x8800 0x0 0x0 0x2 &ipic 21 0x8
235 0x8800 0x0 0x0 0x3 &ipic 22 0x8
236 0x8800 0x0 0x0 0x4 &ipic 23 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500237
238 /* IDSEL 0x12 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500239 0x9000 0x0 0x0 0x1 &ipic 22 0x8
240 0x9000 0x0 0x0 0x2 &ipic 23 0x8
241 0x9000 0x0 0x0 0x3 &ipic 20 0x8
242 0x9000 0x0 0x0 0x4 &ipic 21 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500243
244 /* IDSEL 0x13 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500245 0x9800 0x0 0x0 0x1 &ipic 23 0x8
246 0x9800 0x0 0x0 0x2 &ipic 20 0x8
247 0x9800 0x0 0x0 0x3 &ipic 21 0x8
248 0x9800 0x0 0x0 0x4 &ipic 22 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500249
250 /* IDSEL 0x15 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500251 0xa800 0x0 0x0 0x1 &ipic 20 0x8
252 0xa800 0x0 0x0 0x2 &ipic 21 0x8
253 0xa800 0x0 0x0 0x3 &ipic 22 0x8
254 0xa800 0x0 0x0 0x4 &ipic 23 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500255
256 /* IDSEL 0x16 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500257 0xb000 0x0 0x0 0x1 &ipic 23 0x8
258 0xb000 0x0 0x0 0x2 &ipic 20 0x8
259 0xb000 0x0 0x0 0x3 &ipic 21 0x8
260 0xb000 0x0 0x0 0x4 &ipic 22 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500261
262 /* IDSEL 0x17 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500263 0xb800 0x0 0x0 0x1 &ipic 22 0x8
264 0xb800 0x0 0x0 0x2 &ipic 23 0x8
265 0xb800 0x0 0x0 0x3 &ipic 20 0x8
266 0xb800 0x0 0x0 0x4 &ipic 21 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500267
268 /* IDSEL 0x18 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500269 0xc000 0x0 0x0 0x1 &ipic 21 0x8
270 0xc000 0x0 0x0 0x2 &ipic 22 0x8
271 0xc000 0x0 0x0 0x3 &ipic 23 0x8
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500272 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500273 interrupt-parent = <&ipic>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500274 interrupts = <66 0x8>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500275 bus-range = <0 0>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500276 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
277 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
278 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
279 clock-frequency = <66666666>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500280 #interrupt-cells = <1>;
281 #size-cells = <2>;
282 #address-cells = <3>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500283 reg = <0xe0008500 0x100>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500284 compatible = "fsl,mpc8349-pci";
285 device_type = "pci";
286 };
287
Kumar Galaea082fa2007-12-12 01:46:12 -0600288 pci1: pci@e0008600 {
289 cell-index = <2>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500290 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500291 interrupt-map = <
292
293 /* IDSEL 0x11 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500294 0x8800 0x0 0x0 0x1 &ipic 20 0x8
295 0x8800 0x0 0x0 0x2 &ipic 21 0x8
296 0x8800 0x0 0x0 0x3 &ipic 22 0x8
297 0x8800 0x0 0x0 0x4 &ipic 23 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500298
299 /* IDSEL 0x12 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500300 0x9000 0x0 0x0 0x1 &ipic 22 0x8
301 0x9000 0x0 0x0 0x2 &ipic 23 0x8
302 0x9000 0x0 0x0 0x3 &ipic 20 0x8
303 0x9000 0x0 0x0 0x4 &ipic 21 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500304
305 /* IDSEL 0x13 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500306 0x9800 0x0 0x0 0x1 &ipic 23 0x8
307 0x9800 0x0 0x0 0x2 &ipic 20 0x8
308 0x9800 0x0 0x0 0x3 &ipic 21 0x8
309 0x9800 0x0 0x0 0x4 &ipic 22 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500310
311 /* IDSEL 0x15 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500312 0xa800 0x0 0x0 0x1 &ipic 20 0x8
313 0xa800 0x0 0x0 0x2 &ipic 21 0x8
314 0xa800 0x0 0x0 0x3 &ipic 22 0x8
315 0xa800 0x0 0x0 0x4 &ipic 23 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500316
317 /* IDSEL 0x16 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500318 0xb000 0x0 0x0 0x1 &ipic 23 0x8
319 0xb000 0x0 0x0 0x2 &ipic 20 0x8
320 0xb000 0x0 0x0 0x3 &ipic 21 0x8
321 0xb000 0x0 0x0 0x4 &ipic 22 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500322
323 /* IDSEL 0x17 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500324 0xb800 0x0 0x0 0x1 &ipic 22 0x8
325 0xb800 0x0 0x0 0x2 &ipic 23 0x8
326 0xb800 0x0 0x0 0x3 &ipic 20 0x8
327 0xb800 0x0 0x0 0x4 &ipic 21 0x8
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500328
329 /* IDSEL 0x18 */
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500330 0xc000 0x0 0x0 0x1 &ipic 21 0x8
331 0xc000 0x0 0x0 0x2 &ipic 22 0x8
332 0xc000 0x0 0x0 0x3 &ipic 23 0x8
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500333 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500334 interrupt-parent = <&ipic>;
Paul Gortmakercda13dd2008-01-28 16:09:36 -0500335 interrupts = <66 0x8>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500336 bus-range = <0 0>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500337 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
338 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
339 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
340 clock-frequency = <66666666>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500341 #interrupt-cells = <1>;
342 #size-cells = <2>;
343 #address-cells = <3>;
Paul Gortmakereedd62e2008-01-25 01:22:09 -0500344 reg = <0xe0008600 0x100>;
Kumar Gala1b3c5cda2007-09-12 18:23:46 -0500345 compatible = "fsl,mpc8349-pci";
346 device_type = "pci";
347 };
Kim Phillips1b9a93e2006-08-29 18:13:31 -0500348};