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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * x86 SMP booting functions
3 *
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
6 *
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
9 *
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
13 *
14 * This code is released under the GNU General Public License version 2 or
15 * later.
16 *
17 * Fixes
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
28 * from Jose Renau
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34* Rusty Russell : Hacked into shape for new "hotplug" boot process. */
35
Rusty Russelld3561b72006-12-07 02:14:07 +010036
37/* SMP boot always wants to use real time delay to allow sufficient time for
38 * the APs to come online */
39#define USE_REAL_TIME_DELAY
40
Linus Torvalds1da177e2005-04-16 15:20:36 -070041#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070042#include <linux/init.h>
43#include <linux/kernel.h>
44
45#include <linux/mm.h>
46#include <linux/sched.h>
47#include <linux/kernel_stat.h>
48#include <linux/smp_lock.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070049#include <linux/bootmem.h>
Zwane Mwaikambof3705132005-06-25 14:54:50 -070050#include <linux/notifier.h>
51#include <linux/cpu.h>
52#include <linux/percpu.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053
54#include <linux/delay.h>
55#include <linux/mc146818rtc.h>
56#include <asm/tlbflush.h>
57#include <asm/desc.h>
58#include <asm/arch_hooks.h>
Don Zickus3e4ff112006-06-26 13:57:01 +020059#include <asm/nmi.h>
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +010060#include <asm/pda.h>
Siddha, Suresh Bb0d0a4b2006-12-07 02:14:10 +010061#include <asm/genapic.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
63#include <mach_apic.h>
64#include <mach_wakecpu.h>
65#include <smpboot_hooks.h>
Zachary Amsden7ce0bcf2007-02-13 13:26:21 +010066#include <asm/vmi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
68/* Set if we find a B stepping CPU */
Li Shaohua0bb31842005-06-25 14:54:55 -070069static int __devinitdata smp_b_stepping;
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
71/* Number of siblings per CPU package */
72int smp_num_siblings = 1;
Alexey Dobriyan129f6942005-06-23 00:08:33 -070073EXPORT_SYMBOL(smp_num_siblings);
Li Shaohuad7208032005-06-25 14:54:54 -070074
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -080075/* Last level cache ID of each logical CPU */
76int cpu_llc_id[NR_CPUS] __cpuinitdata = {[0 ... NR_CPUS-1] = BAD_APICID};
77
Siddha, Suresh B94605ef2005-11-05 17:25:54 +010078/* representing HT siblings of each logical CPU */
Christoph Lameter6c036522005-07-07 17:56:59 -070079cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
Li Shaohuad7208032005-06-25 14:54:54 -070080EXPORT_SYMBOL(cpu_sibling_map);
81
Siddha, Suresh B94605ef2005-11-05 17:25:54 +010082/* representing HT and core siblings of each logical CPU */
Christoph Lameter6c036522005-07-07 17:56:59 -070083cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
Li Shaohuad7208032005-06-25 14:54:54 -070084EXPORT_SYMBOL(cpu_core_map);
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086/* bitmap of online cpus */
Christoph Lameter6c036522005-07-07 17:56:59 -070087cpumask_t cpu_online_map __read_mostly;
Alexey Dobriyan129f6942005-06-23 00:08:33 -070088EXPORT_SYMBOL(cpu_online_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
90cpumask_t cpu_callin_map;
91cpumask_t cpu_callout_map;
Alexey Dobriyan129f6942005-06-23 00:08:33 -070092EXPORT_SYMBOL(cpu_callout_map);
Zwane Mwaikambo4ad8d382005-09-03 15:56:51 -070093cpumask_t cpu_possible_map;
94EXPORT_SYMBOL(cpu_possible_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -070095static cpumask_t smp_commenced_mask;
96
Li Shaohuae1367da2005-06-25 14:54:56 -070097/* TSC's upper 32 bits can't be written in eariler CPU (before prescott), there
98 * is no way to resync one AP against BP. TBD: for prescott and above, we
99 * should use IA64's algorithm
100 */
101static int __devinitdata tsc_sync_disabled;
102
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103/* Per CPU bogomips and other parameters */
104struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
Alexey Dobriyan129f6942005-06-23 00:08:33 -0700105EXPORT_SYMBOL(cpu_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106
Christoph Lameter6c036522005-07-07 17:56:59 -0700107u8 x86_cpu_to_apicid[NR_CPUS] __read_mostly =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108 { [0 ... NR_CPUS-1] = 0xff };
109EXPORT_SYMBOL(x86_cpu_to_apicid);
110
keith mannthey3b086062006-09-29 01:58:46 -0700111u8 apicid_2_node[MAX_APICID];
112
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113/*
114 * Trampoline 80x86 program as an array.
115 */
116
117extern unsigned char trampoline_data [];
118extern unsigned char trampoline_end [];
119static unsigned char *trampoline_base;
120static int trampoline_exec;
121
122static void map_cpu_to_logical_apicid(void);
123
Zwane Mwaikambof3705132005-06-25 14:54:50 -0700124/* State of each CPU. */
125DEFINE_PER_CPU(int, cpu_state) = { 0 };
126
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127/*
128 * Currently trivial. Write the real->protected mode
129 * bootstrap into the page concerned. The caller
130 * has made sure it's suitably aligned.
131 */
132
Li Shaohua0bb31842005-06-25 14:54:55 -0700133static unsigned long __devinit setup_trampoline(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134{
135 memcpy(trampoline_base, trampoline_data, trampoline_end - trampoline_data);
136 return virt_to_phys(trampoline_base);
137}
138
139/*
140 * We are called very early to get the low memory for the
141 * SMP bootup trampoline page.
142 */
143void __init smp_alloc_memory(void)
144{
145 trampoline_base = (void *) alloc_bootmem_low_pages(PAGE_SIZE);
146 /*
147 * Has to be in very low memory so we can execute
148 * real-mode AP code.
149 */
150 if (__pa(trampoline_base) >= 0x9F000)
151 BUG();
152 /*
153 * Make the SMP trampoline executable:
154 */
155 trampoline_exec = set_kernel_exec((unsigned long)trampoline_base, 1);
156}
157
158/*
159 * The bootstrap kernel entry code has set these up. Save them for
160 * a given CPU
161 */
162
Vivek Goyal4a5d1072007-01-11 01:52:44 +0100163static void __cpuinit smp_store_cpu_info(int id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164{
165 struct cpuinfo_x86 *c = cpu_data + id;
166
167 *c = boot_cpu_data;
168 if (id!=0)
169 identify_cpu(c);
170 /*
171 * Mask B, Pentium, but not Pentium MMX
172 */
173 if (c->x86_vendor == X86_VENDOR_INTEL &&
174 c->x86 == 5 &&
175 c->x86_mask >= 1 && c->x86_mask <= 4 &&
176 c->x86_model <= 3)
177 /*
178 * Remember we have B step Pentia with bugs
179 */
180 smp_b_stepping = 1;
181
182 /*
183 * Certain Athlons might work (for various values of 'work') in SMP
184 * but they are not certified as MP capable.
185 */
186 if ((c->x86_vendor == X86_VENDOR_AMD) && (c->x86 == 6)) {
187
Dave Jones3ca113e2006-09-26 10:52:34 +0200188 if (num_possible_cpus() == 1)
189 goto valid_k7;
190
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191 /* Athlon 660/661 is valid. */
192 if ((c->x86_model==6) && ((c->x86_mask==0) || (c->x86_mask==1)))
193 goto valid_k7;
194
195 /* Duron 670 is valid */
196 if ((c->x86_model==7) && (c->x86_mask==0))
197 goto valid_k7;
198
199 /*
200 * Athlon 662, Duron 671, and Athlon >model 7 have capability bit.
201 * It's worth noting that the A5 stepping (662) of some Athlon XP's
202 * have the MP bit set.
203 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for more.
204 */
205 if (((c->x86_model==6) && (c->x86_mask>=2)) ||
206 ((c->x86_model==7) && (c->x86_mask>=1)) ||
207 (c->x86_model> 7))
208 if (cpu_has_mp)
209 goto valid_k7;
210
211 /* If we get here, it's not a certified SMP capable AMD system. */
Randy Dunlap9f158332005-09-13 01:25:16 -0700212 add_taint(TAINT_UNSAFE_SMP);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 }
214
215valid_k7:
216 ;
217}
218
219/*
220 * TSC synchronization.
221 *
222 * We first check whether all CPUs have their TSC's synchronized,
223 * then we print a warning if not, and always resync.
224 */
225
Andrew Mortonc35a7262006-07-30 03:03:19 -0700226static struct {
227 atomic_t start_flag;
228 atomic_t count_start;
229 atomic_t count_stop;
230 unsigned long long values[NR_CPUS];
Vivek Goyal3771a452007-01-05 16:36:34 -0800231} tsc __cpuinitdata = {
Andrew Mortonc35a7262006-07-30 03:03:19 -0700232 .start_flag = ATOMIC_INIT(0),
233 .count_start = ATOMIC_INIT(0),
234 .count_stop = ATOMIC_INIT(0),
235};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236
237#define NR_LOOPS 5
238
Andrew Mortonc35a7262006-07-30 03:03:19 -0700239static void __init synchronize_tsc_bp(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240{
241 int i;
242 unsigned long long t0;
243 unsigned long long sum, avg;
244 long long delta;
Andrew Mortona3a255e2005-06-23 00:08:34 -0700245 unsigned int one_usec;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246 int buggy = 0;
247
248 printk(KERN_INFO "checking TSC synchronization across %u CPUs: ", num_booting_cpus());
249
250 /* convert from kcyc/sec to cyc/usec */
251 one_usec = cpu_khz / 1000;
252
Andrew Mortonc35a7262006-07-30 03:03:19 -0700253 atomic_set(&tsc.start_flag, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 wmb();
255
256 /*
257 * We loop a few times to get a primed instruction cache,
258 * then the last pass is more or less synchronized and
259 * the BP and APs set their cycle counters to zero all at
260 * once. This reduces the chance of having random offsets
261 * between the processors, and guarantees that the maximum
262 * delay between the cycle counters is never bigger than
263 * the latency of information-passing (cachelines) between
264 * two CPUs.
265 */
266 for (i = 0; i < NR_LOOPS; i++) {
267 /*
268 * all APs synchronize but they loop on '== num_cpus'
269 */
Andrew Mortonc35a7262006-07-30 03:03:19 -0700270 while (atomic_read(&tsc.count_start) != num_booting_cpus()-1)
Andreas Mohr18698912006-06-25 05:46:52 -0700271 cpu_relax();
Andrew Mortonc35a7262006-07-30 03:03:19 -0700272 atomic_set(&tsc.count_stop, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273 wmb();
274 /*
275 * this lets the APs save their current TSC:
276 */
Andrew Mortonc35a7262006-07-30 03:03:19 -0700277 atomic_inc(&tsc.count_start);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278
Andrew Mortonc35a7262006-07-30 03:03:19 -0700279 rdtscll(tsc.values[smp_processor_id()]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280 /*
281 * We clear the TSC in the last loop:
282 */
283 if (i == NR_LOOPS-1)
284 write_tsc(0, 0);
285
286 /*
287 * Wait for all APs to leave the synchronization point:
288 */
Andrew Mortonc35a7262006-07-30 03:03:19 -0700289 while (atomic_read(&tsc.count_stop) != num_booting_cpus()-1)
Andreas Mohr18698912006-06-25 05:46:52 -0700290 cpu_relax();
Andrew Mortonc35a7262006-07-30 03:03:19 -0700291 atomic_set(&tsc.count_start, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 wmb();
Andrew Mortonc35a7262006-07-30 03:03:19 -0700293 atomic_inc(&tsc.count_stop);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294 }
295
296 sum = 0;
297 for (i = 0; i < NR_CPUS; i++) {
298 if (cpu_isset(i, cpu_callout_map)) {
Andrew Mortonc35a7262006-07-30 03:03:19 -0700299 t0 = tsc.values[i];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 sum += t0;
301 }
302 }
303 avg = sum;
304 do_div(avg, num_booting_cpus());
305
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306 for (i = 0; i < NR_CPUS; i++) {
307 if (!cpu_isset(i, cpu_callout_map))
308 continue;
Andrew Mortonc35a7262006-07-30 03:03:19 -0700309 delta = tsc.values[i] - avg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310 if (delta < 0)
311 delta = -delta;
312 /*
313 * We report bigger than 2 microseconds clock differences.
314 */
315 if (delta > 2*one_usec) {
Andrew Mortonc35a7262006-07-30 03:03:19 -0700316 long long realdelta;
317
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 if (!buggy) {
319 buggy = 1;
320 printk("\n");
321 }
322 realdelta = delta;
323 do_div(realdelta, one_usec);
Andrew Mortonc35a7262006-07-30 03:03:19 -0700324 if (tsc.values[i] < avg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325 realdelta = -realdelta;
326
Andrew Mortonc35a7262006-07-30 03:03:19 -0700327 if (realdelta)
328 printk(KERN_INFO "CPU#%d had %Ld usecs TSC "
Dave Jones7f5910e2006-04-27 18:39:24 -0700329 "skew, fixed it up.\n", i, realdelta);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 }
332 if (!buggy)
333 printk("passed.\n");
334}
335
Vivek Goyal3771a452007-01-05 16:36:34 -0800336static void __cpuinit synchronize_tsc_ap(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337{
338 int i;
339
340 /*
341 * Not every cpu is online at the time
342 * this gets called, so we first wait for the BP to
343 * finish SMP initialization:
344 */
Andrew Mortonc35a7262006-07-30 03:03:19 -0700345 while (!atomic_read(&tsc.start_flag))
Andreas Mohr18698912006-06-25 05:46:52 -0700346 cpu_relax();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347
348 for (i = 0; i < NR_LOOPS; i++) {
Andrew Mortonc35a7262006-07-30 03:03:19 -0700349 atomic_inc(&tsc.count_start);
350 while (atomic_read(&tsc.count_start) != num_booting_cpus())
Andreas Mohr18698912006-06-25 05:46:52 -0700351 cpu_relax();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352
Andrew Mortonc35a7262006-07-30 03:03:19 -0700353 rdtscll(tsc.values[smp_processor_id()]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354 if (i == NR_LOOPS-1)
355 write_tsc(0, 0);
356
Andrew Mortonc35a7262006-07-30 03:03:19 -0700357 atomic_inc(&tsc.count_stop);
358 while (atomic_read(&tsc.count_stop) != num_booting_cpus())
Andreas Mohr18698912006-06-25 05:46:52 -0700359 cpu_relax();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 }
361}
362#undef NR_LOOPS
363
364extern void calibrate_delay(void);
365
366static atomic_t init_deasserted;
367
Vivek Goyal4a5d1072007-01-11 01:52:44 +0100368static void __cpuinit smp_callin(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369{
370 int cpuid, phys_id;
371 unsigned long timeout;
372
373 /*
374 * If waken up by an INIT in an 82489DX configuration
375 * we may get here before an INIT-deassert IPI reaches
376 * our local APIC. We have to wait for the IPI or we'll
377 * lock up on an APIC access.
378 */
379 wait_for_init_deassert(&init_deasserted);
380
381 /*
382 * (This works even if the APIC is not enabled.)
383 */
384 phys_id = GET_APIC_ID(apic_read(APIC_ID));
385 cpuid = smp_processor_id();
386 if (cpu_isset(cpuid, cpu_callin_map)) {
387 printk("huh, phys CPU#%d, CPU#%d already present??\n",
388 phys_id, cpuid);
389 BUG();
390 }
391 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
392
393 /*
394 * STARTUP IPIs are fragile beasts as they might sometimes
395 * trigger some glue motherboard logic. Complete APIC bus
396 * silence for 1 second, this overestimates the time the
397 * boot CPU is spending to send the up to 2 STARTUP IPIs
398 * by a factor of two. This should be enough.
399 */
400
401 /*
402 * Waiting 2s total for startup (udelay is not yet working)
403 */
404 timeout = jiffies + 2*HZ;
405 while (time_before(jiffies, timeout)) {
406 /*
407 * Has the boot CPU finished it's STARTUP sequence?
408 */
409 if (cpu_isset(cpuid, cpu_callout_map))
410 break;
411 rep_nop();
412 }
413
414 if (!time_before(jiffies, timeout)) {
415 printk("BUG: CPU%d started up but did not get a callout!\n",
416 cpuid);
417 BUG();
418 }
419
420 /*
421 * the boot CPU has finished the init stage and is spinning
422 * on callin_map until we finish. We are free to set up this
423 * CPU, first the APIC. (this is probably redundant on most
424 * boards)
425 */
426
427 Dprintk("CALLIN, before setup_local_APIC().\n");
428 smp_callin_clear_local_apic();
429 setup_local_APIC();
430 map_cpu_to_logical_apicid();
431
432 /*
433 * Get our bogomips.
434 */
435 calibrate_delay();
436 Dprintk("Stack at about %p\n",&cpuid);
437
438 /*
439 * Save our processor parameters
440 */
441 smp_store_cpu_info(cpuid);
442
443 disable_APIC_timer();
444
445 /*
446 * Allow the master to continue.
447 */
448 cpu_set(cpuid, cpu_callin_map);
449
450 /*
451 * Synchronize the TSC with the BP
452 */
Li Shaohuae1367da2005-06-25 14:54:56 -0700453 if (cpu_has_tsc && cpu_khz && !tsc_sync_disabled)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454 synchronize_tsc_ap();
455}
456
457static int cpucount;
458
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -0800459/* maps the cpu to the sched domain representing multi-core */
460cpumask_t cpu_coregroup_map(int cpu)
461{
462 struct cpuinfo_x86 *c = cpu_data + cpu;
463 /*
464 * For perf, we return last level cache shared map.
Siddha, Suresh B5c45bf22006-06-27 02:54:42 -0700465 * And for power savings, we return cpu_core_map
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -0800466 */
Siddha, Suresh B5c45bf22006-06-27 02:54:42 -0700467 if (sched_mc_power_savings || sched_smt_power_savings)
468 return cpu_core_map[cpu];
469 else
470 return c->llc_shared_map;
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -0800471}
472
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100473/* representing cpus for which sibling maps can be computed */
474static cpumask_t cpu_sibling_setup_map;
475
Li Shaohuad7208032005-06-25 14:54:54 -0700476static inline void
477set_cpu_sibling_map(int cpu)
478{
479 int i;
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100480 struct cpuinfo_x86 *c = cpu_data;
481
482 cpu_set(cpu, cpu_sibling_setup_map);
Li Shaohuad7208032005-06-25 14:54:54 -0700483
484 if (smp_num_siblings > 1) {
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100485 for_each_cpu_mask(i, cpu_sibling_setup_map) {
Rohit Seth4b89aff2006-06-27 02:53:46 -0700486 if (c[cpu].phys_proc_id == c[i].phys_proc_id &&
487 c[cpu].cpu_core_id == c[i].cpu_core_id) {
Li Shaohuad7208032005-06-25 14:54:54 -0700488 cpu_set(i, cpu_sibling_map[cpu]);
489 cpu_set(cpu, cpu_sibling_map[i]);
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100490 cpu_set(i, cpu_core_map[cpu]);
491 cpu_set(cpu, cpu_core_map[i]);
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -0800492 cpu_set(i, c[cpu].llc_shared_map);
493 cpu_set(cpu, c[i].llc_shared_map);
Li Shaohuad7208032005-06-25 14:54:54 -0700494 }
495 }
496 } else {
497 cpu_set(cpu, cpu_sibling_map[cpu]);
498 }
499
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -0800500 cpu_set(cpu, c[cpu].llc_shared_map);
501
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100502 if (current_cpu_data.x86_max_cores == 1) {
Li Shaohuad7208032005-06-25 14:54:54 -0700503 cpu_core_map[cpu] = cpu_sibling_map[cpu];
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100504 c[cpu].booted_cores = 1;
505 return;
506 }
507
508 for_each_cpu_mask(i, cpu_sibling_setup_map) {
Siddha, Suresh B1e9f28f2006-03-27 01:15:22 -0800509 if (cpu_llc_id[cpu] != BAD_APICID &&
510 cpu_llc_id[cpu] == cpu_llc_id[i]) {
511 cpu_set(i, c[cpu].llc_shared_map);
512 cpu_set(cpu, c[i].llc_shared_map);
513 }
Rohit Seth4b89aff2006-06-27 02:53:46 -0700514 if (c[cpu].phys_proc_id == c[i].phys_proc_id) {
Siddha, Suresh B94605ef2005-11-05 17:25:54 +0100515 cpu_set(i, cpu_core_map[cpu]);
516 cpu_set(cpu, cpu_core_map[i]);
517 /*
518 * Does this new cpu bringup a new core?
519 */
520 if (cpus_weight(cpu_sibling_map[cpu]) == 1) {
521 /*
522 * for each core in package, increment
523 * the booted_cores for this new cpu
524 */
525 if (first_cpu(cpu_sibling_map[i]) == i)
526 c[cpu].booted_cores++;
527 /*
528 * increment the core count for all
529 * the other cpus in this package
530 */
531 if (i != cpu)
532 c[i].booted_cores++;
533 } else if (i != cpu && !c[cpu].booted_cores)
534 c[cpu].booted_cores = c[i].booted_cores;
535 }
Li Shaohuad7208032005-06-25 14:54:54 -0700536 }
537}
538
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539/*
540 * Activate a secondary processor.
541 */
Vivek Goyal4a5d1072007-01-11 01:52:44 +0100542static void __cpuinit start_secondary(void *unused)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543{
544 /*
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100545 * Don't put *anything* before secondary_cpu_init(), SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546 * booting is too fragile that we want to limit the
547 * things done here to the most necessary things.
548 */
Zachary Amsden7ce0bcf2007-02-13 13:26:21 +0100549#ifdef CONFIG_VMI
550 vmi_bringup();
551#endif
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100552 secondary_cpu_init();
Nick Piggin5bfb5d62005-11-08 21:39:01 -0800553 preempt_disable();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554 smp_callin();
555 while (!cpu_isset(smp_processor_id(), smp_commenced_mask))
556 rep_nop();
Zachary Amsdenbbab4f32007-02-13 13:26:21 +0100557 setup_secondary_clock();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 if (nmi_watchdog == NMI_IO_APIC) {
559 disable_8259A_irq(0);
560 enable_NMI_through_LVT0(NULL);
561 enable_8259A_irq(0);
562 }
563 enable_APIC_timer();
564 /*
565 * low-memory mappings have been cleared, flush them from
566 * the local TLBs too.
567 */
568 local_flush_tlb();
Li Shaohua6fe940d2005-06-25 14:54:53 -0700569
Li Shaohuad7208032005-06-25 14:54:54 -0700570 /* This must be done before setting cpu_online_map */
571 set_cpu_sibling_map(raw_smp_processor_id());
572 wmb();
573
Li Shaohua6fe940d2005-06-25 14:54:53 -0700574 /*
575 * We need to hold call_lock, so there is no inconsistency
576 * between the time smp_call_function() determines number of
577 * IPI receipients, and the time when the determination is made
578 * for which cpus receive the IPI. Holding this
579 * lock helps us to not include this cpu in a currently in progress
580 * smp_call_function().
581 */
582 lock_ipi_call_lock();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583 cpu_set(smp_processor_id(), cpu_online_map);
Li Shaohua6fe940d2005-06-25 14:54:53 -0700584 unlock_ipi_call_lock();
Li Shaohuae1367da2005-06-25 14:54:56 -0700585 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586
587 /* We can take interrupts now: we're officially "up". */
588 local_irq_enable();
589
590 wmb();
591 cpu_idle();
592}
593
594/*
595 * Everything has been set up for the secondary
596 * CPUs - they just need to reload everything
597 * from the task structure
598 * This function must not return.
599 */
Li Shaohua0bb31842005-06-25 14:54:55 -0700600void __devinit initialize_secondary(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601{
602 /*
James Bottomley9ee79a32007-01-22 09:18:31 -0600603 * switch to the per CPU GDT we already set up
604 * in do_boot_cpu()
605 */
606 cpu_set_gdt(current_thread_info()->cpu);
607
608 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609 * We don't actually need to load the full TSS,
610 * basically just the stack pointer and the eip.
611 */
612
613 asm volatile(
614 "movl %0,%%esp\n\t"
615 "jmp *%1"
616 :
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100617 :"m" (current->thread.esp),"m" (current->thread.eip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700618}
619
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100620/* Static state in head.S used to set up a CPU */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621extern struct {
622 void * esp;
623 unsigned short ss;
624} stack_start;
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100625extern struct i386_pda *start_pda;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626
627#ifdef CONFIG_NUMA
628
629/* which logical CPUs are on which nodes */
Christoph Lameter6c036522005-07-07 17:56:59 -0700630cpumask_t node_2_cpu_mask[MAX_NUMNODES] __read_mostly =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
Greg Banksa406c362006-10-02 02:17:41 -0700632EXPORT_SYMBOL(node_2_cpu_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633/* which node each logical CPU is on */
Christoph Lameter6c036522005-07-07 17:56:59 -0700634int cpu_2_node[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635EXPORT_SYMBOL(cpu_2_node);
636
637/* set up a mapping between cpu and node. */
638static inline void map_cpu_to_node(int cpu, int node)
639{
640 printk("Mapping cpu %d to node %d\n", cpu, node);
641 cpu_set(cpu, node_2_cpu_mask[node]);
642 cpu_2_node[cpu] = node;
643}
644
645/* undo a mapping between cpu and node. */
646static inline void unmap_cpu_to_node(int cpu)
647{
648 int node;
649
650 printk("Unmapping cpu %d from all nodes\n", cpu);
651 for (node = 0; node < MAX_NUMNODES; node ++)
652 cpu_clear(cpu, node_2_cpu_mask[node]);
653 cpu_2_node[cpu] = 0;
654}
655#else /* !CONFIG_NUMA */
656
657#define map_cpu_to_node(cpu, node) ({})
658#define unmap_cpu_to_node(cpu) ({})
659
660#endif /* CONFIG_NUMA */
661
Christoph Lameter6c036522005-07-07 17:56:59 -0700662u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663
664static void map_cpu_to_logical_apicid(void)
665{
666 int cpu = smp_processor_id();
667 int apicid = logical_smp_processor_id();
Keith Mannthey78b656b2006-10-03 18:25:52 -0700668 int node = apicid_to_node(apicid);
keith manntheybfa0e9a2006-09-25 16:25:35 -0700669
670 if (!node_online(node))
671 node = first_online_node;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672
673 cpu_2_logical_apicid[cpu] = apicid;
keith manntheybfa0e9a2006-09-25 16:25:35 -0700674 map_cpu_to_node(cpu, node);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700675}
676
677static void unmap_cpu_to_logical_apicid(int cpu)
678{
679 cpu_2_logical_apicid[cpu] = BAD_APICID;
680 unmap_cpu_to_node(cpu);
681}
682
683#if APIC_DEBUG
684static inline void __inquire_remote_apic(int apicid)
685{
686 int i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
687 char *names[] = { "ID", "VERSION", "SPIV" };
688 int timeout, status;
689
690 printk("Inquiring remote APIC #%d...\n", apicid);
691
Tobias Klauser38e548e2005-11-07 00:58:31 -0800692 for (i = 0; i < ARRAY_SIZE(regs); i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 printk("... APIC #%d %s: ", apicid, names[i]);
694
695 /*
696 * Wait for idle.
697 */
698 apic_wait_icr_idle();
699
700 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
701 apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
702
703 timeout = 0;
704 do {
705 udelay(100);
706 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
707 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
708
709 switch (status) {
710 case APIC_ICR_RR_VALID:
711 status = apic_read(APIC_RRR);
712 printk("%08x\n", status);
713 break;
714 default:
715 printk("failed\n");
716 }
717 }
718}
719#endif
720
721#ifdef WAKE_SECONDARY_VIA_NMI
722/*
723 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
724 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
725 * won't ... remember to clear down the APIC, etc later.
726 */
Li Shaohua0bb31842005-06-25 14:54:55 -0700727static int __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
729{
730 unsigned long send_status = 0, accept_status = 0;
731 int timeout, maxlvt;
732
733 /* Target chip */
734 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
735
736 /* Boot on the stack */
737 /* Kick the second */
738 apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
739
740 Dprintk("Waiting for send to finish...\n");
741 timeout = 0;
742 do {
743 Dprintk("+");
744 udelay(100);
745 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
746 } while (send_status && (timeout++ < 1000));
747
748 /*
749 * Give the other CPU some time to accept the IPI.
750 */
751 udelay(200);
752 /*
753 * Due to the Pentium erratum 3AP.
754 */
755 maxlvt = get_maxlvt();
756 if (maxlvt > 3) {
757 apic_read_around(APIC_SPIV);
758 apic_write(APIC_ESR, 0);
759 }
760 accept_status = (apic_read(APIC_ESR) & 0xEF);
761 Dprintk("NMI sent.\n");
762
763 if (send_status)
764 printk("APIC never delivered???\n");
765 if (accept_status)
766 printk("APIC delivery error (%lx).\n", accept_status);
767
768 return (send_status | accept_status);
769}
770#endif /* WAKE_SECONDARY_VIA_NMI */
771
772#ifdef WAKE_SECONDARY_VIA_INIT
Li Shaohua0bb31842005-06-25 14:54:55 -0700773static int __devinit
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
775{
776 unsigned long send_status = 0, accept_status = 0;
777 int maxlvt, timeout, num_starts, j;
778
779 /*
780 * Be paranoid about clearing APIC errors.
781 */
782 if (APIC_INTEGRATED(apic_version[phys_apicid])) {
783 apic_read_around(APIC_SPIV);
784 apic_write(APIC_ESR, 0);
785 apic_read(APIC_ESR);
786 }
787
788 Dprintk("Asserting INIT.\n");
789
790 /*
791 * Turn INIT on target chip
792 */
793 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
794
795 /*
796 * Send IPI
797 */
798 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
799 | APIC_DM_INIT);
800
801 Dprintk("Waiting for send to finish...\n");
802 timeout = 0;
803 do {
804 Dprintk("+");
805 udelay(100);
806 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
807 } while (send_status && (timeout++ < 1000));
808
809 mdelay(10);
810
811 Dprintk("Deasserting INIT.\n");
812
813 /* Target chip */
814 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
815
816 /* Send IPI */
817 apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
818
819 Dprintk("Waiting for send to finish...\n");
820 timeout = 0;
821 do {
822 Dprintk("+");
823 udelay(100);
824 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
825 } while (send_status && (timeout++ < 1000));
826
827 atomic_set(&init_deasserted, 1);
828
829 /*
830 * Should we send STARTUP IPIs ?
831 *
832 * Determine this based on the APIC version.
833 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
834 */
835 if (APIC_INTEGRATED(apic_version[phys_apicid]))
836 num_starts = 2;
837 else
838 num_starts = 0;
839
840 /*
Zachary Amsdenae5da272007-02-13 13:26:21 +0100841 * Paravirt / VMI wants a startup IPI hook here to set up the
842 * target processor state.
843 */
844 startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
845 (unsigned long) stack_start.esp);
846
847 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 * Run STARTUP IPI loop.
849 */
850 Dprintk("#startup loops: %d.\n", num_starts);
851
852 maxlvt = get_maxlvt();
853
854 for (j = 1; j <= num_starts; j++) {
855 Dprintk("Sending STARTUP #%d.\n",j);
856 apic_read_around(APIC_SPIV);
857 apic_write(APIC_ESR, 0);
858 apic_read(APIC_ESR);
859 Dprintk("After apic_write.\n");
860
861 /*
862 * STARTUP IPI
863 */
864
865 /* Target chip */
866 apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
867
868 /* Boot on the stack */
869 /* Kick the second */
870 apic_write_around(APIC_ICR, APIC_DM_STARTUP
871 | (start_eip >> 12));
872
873 /*
874 * Give the other CPU some time to accept the IPI.
875 */
876 udelay(300);
877
878 Dprintk("Startup point 1.\n");
879
880 Dprintk("Waiting for send to finish...\n");
881 timeout = 0;
882 do {
883 Dprintk("+");
884 udelay(100);
885 send_status = apic_read(APIC_ICR) & APIC_ICR_BUSY;
886 } while (send_status && (timeout++ < 1000));
887
888 /*
889 * Give the other CPU some time to accept the IPI.
890 */
891 udelay(200);
892 /*
893 * Due to the Pentium erratum 3AP.
894 */
895 if (maxlvt > 3) {
896 apic_read_around(APIC_SPIV);
897 apic_write(APIC_ESR, 0);
898 }
899 accept_status = (apic_read(APIC_ESR) & 0xEF);
900 if (send_status || accept_status)
901 break;
902 }
903 Dprintk("After Startup.\n");
904
905 if (send_status)
906 printk("APIC never delivered???\n");
907 if (accept_status)
908 printk("APIC delivery error (%lx).\n", accept_status);
909
910 return (send_status | accept_status);
911}
912#endif /* WAKE_SECONDARY_VIA_INIT */
913
914extern cpumask_t cpu_initialized;
Li Shaohuae1367da2005-06-25 14:54:56 -0700915static inline int alloc_cpu_id(void)
916{
917 cpumask_t tmp_map;
918 int cpu;
919 cpus_complement(tmp_map, cpu_present_map);
920 cpu = first_cpu(tmp_map);
921 if (cpu >= NR_CPUS)
922 return -ENODEV;
923 return cpu;
924}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925
Li Shaohuae1367da2005-06-25 14:54:56 -0700926#ifdef CONFIG_HOTPLUG_CPU
927static struct task_struct * __devinitdata cpu_idle_tasks[NR_CPUS];
928static inline struct task_struct * alloc_idle_task(int cpu)
929{
930 struct task_struct *idle;
931
932 if ((idle = cpu_idle_tasks[cpu]) != NULL) {
933 /* initialize thread_struct. we really want to avoid destroy
934 * idle tread
935 */
akpm@osdl.org07b047f2006-01-12 01:05:41 -0800936 idle->thread.esp = (unsigned long)task_pt_regs(idle);
Li Shaohuae1367da2005-06-25 14:54:56 -0700937 init_idle(idle, cpu);
938 return idle;
939 }
940 idle = fork_idle(cpu);
941
942 if (!IS_ERR(idle))
943 cpu_idle_tasks[cpu] = idle;
944 return idle;
945}
946#else
947#define alloc_idle_task(cpu) fork_idle(cpu)
948#endif
949
Vivek Goyal4a5d1072007-01-11 01:52:44 +0100950static int __cpuinit do_boot_cpu(int apicid, int cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951/*
952 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
953 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
954 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
955 */
956{
957 struct task_struct *idle;
958 unsigned long boot_error;
Li Shaohuae1367da2005-06-25 14:54:56 -0700959 int timeout;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960 unsigned long start_eip;
961 unsigned short nmi_high = 0, nmi_low = 0;
962
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963 /*
964 * We can't use kernel_thread since we must avoid to
965 * reschedule the child.
966 */
Li Shaohuae1367da2005-06-25 14:54:56 -0700967 idle = alloc_idle_task(cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968 if (IS_ERR(idle))
969 panic("failed fork for CPU %d", cpu);
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100970
971 /* Pre-allocate and initialize the CPU's GDT and PDA so it
972 doesn't have to do any memory allocation during the
973 delicate CPU-bringup phase. */
974 if (!init_gdt(cpu, idle)) {
975 printk(KERN_INFO "Couldn't allocate GDT/PDA for CPU %d\n", cpu);
976 return -1; /* ? */
977 }
978
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 idle->thread.eip = (unsigned long) start_secondary;
980 /* start_eip had better be page-aligned! */
981 start_eip = setup_trampoline();
982
Jeremy Fitzhardinge62111192006-12-07 02:14:02 +0100983 ++cpucount;
984 alternatives_smp_switch(1);
985
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986 /* So we see what's up */
987 printk("Booting processor %d/%d eip %lx\n", cpu, apicid, start_eip);
988 /* Stack for startup_32 can be just as for start_secondary onwards */
989 stack_start.esp = (void *) idle->thread.esp;
990
991 irq_ctx_init(cpu);
992
keith mannthey3b086062006-09-29 01:58:46 -0700993 x86_cpu_to_apicid[cpu] = apicid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 /*
995 * This grunge runs the startup process for
996 * the targeted processor.
997 */
998
999 atomic_set(&init_deasserted, 0);
1000
1001 Dprintk("Setting warm reset code and vector.\n");
1002
1003 store_NMI_vector(&nmi_high, &nmi_low);
1004
1005 smpboot_setup_warm_reset_vector(start_eip);
1006
1007 /*
1008 * Starting actual IPI sequence...
1009 */
1010 boot_error = wakeup_secondary_cpu(apicid, start_eip);
1011
1012 if (!boot_error) {
1013 /*
1014 * allow APs to start initializing.
1015 */
1016 Dprintk("Before Callout %d.\n", cpu);
1017 cpu_set(cpu, cpu_callout_map);
1018 Dprintk("After Callout %d.\n", cpu);
1019
1020 /*
1021 * Wait 5s total for a response
1022 */
1023 for (timeout = 0; timeout < 50000; timeout++) {
1024 if (cpu_isset(cpu, cpu_callin_map))
1025 break; /* It has booted */
1026 udelay(100);
1027 }
1028
1029 if (cpu_isset(cpu, cpu_callin_map)) {
1030 /* number CPUs logically, starting from 1 (BSP is 0) */
1031 Dprintk("OK.\n");
1032 printk("CPU%d: ", cpu);
1033 print_cpu_info(&cpu_data[cpu]);
1034 Dprintk("CPU has booted.\n");
1035 } else {
1036 boot_error= 1;
1037 if (*((volatile unsigned char *)trampoline_base)
1038 == 0xA5)
1039 /* trampoline started but...? */
1040 printk("Stuck ??\n");
1041 else
1042 /* trampoline code not run */
1043 printk("Not responding.\n");
1044 inquire_remote_apic(apicid);
1045 }
1046 }
Li Shaohuae1367da2005-06-25 14:54:56 -07001047
Linus Torvalds1da177e2005-04-16 15:20:36 -07001048 if (boot_error) {
1049 /* Try to put things back the way they were before ... */
1050 unmap_cpu_to_logical_apicid(cpu);
1051 cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
1052 cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
1053 cpucount--;
Li Shaohuae1367da2005-06-25 14:54:56 -07001054 } else {
1055 x86_cpu_to_apicid[cpu] = apicid;
1056 cpu_set(cpu, cpu_present_map);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057 }
1058
1059 /* mark "stuck" area as not stuck */
1060 *((volatile unsigned long *)trampoline_base) = 0;
1061
1062 return boot_error;
1063}
1064
Li Shaohuae1367da2005-06-25 14:54:56 -07001065#ifdef CONFIG_HOTPLUG_CPU
1066void cpu_exit_clear(void)
1067{
1068 int cpu = raw_smp_processor_id();
1069
1070 idle_task_exit();
1071
1072 cpucount --;
1073 cpu_uninit();
1074 irq_ctx_exit(cpu);
1075
1076 cpu_clear(cpu, cpu_callout_map);
1077 cpu_clear(cpu, cpu_callin_map);
Li Shaohuae1367da2005-06-25 14:54:56 -07001078
1079 cpu_clear(cpu, smp_commenced_mask);
1080 unmap_cpu_to_logical_apicid(cpu);
1081}
1082
1083struct warm_boot_cpu_info {
1084 struct completion *complete;
David Howellsc4028952006-11-22 14:57:56 +00001085 struct work_struct task;
Li Shaohuae1367da2005-06-25 14:54:56 -07001086 int apicid;
1087 int cpu;
1088};
1089
David Howellsc4028952006-11-22 14:57:56 +00001090static void __cpuinit do_warm_boot_cpu(struct work_struct *work)
Li Shaohuae1367da2005-06-25 14:54:56 -07001091{
David Howellsc4028952006-11-22 14:57:56 +00001092 struct warm_boot_cpu_info *info =
1093 container_of(work, struct warm_boot_cpu_info, task);
Li Shaohuae1367da2005-06-25 14:54:56 -07001094 do_boot_cpu(info->apicid, info->cpu);
1095 complete(info->complete);
1096}
1097
Ashok Raj34f361a2006-03-25 03:08:18 -08001098static int __cpuinit __smp_prepare_cpu(int cpu)
Li Shaohuae1367da2005-06-25 14:54:56 -07001099{
Peter Zijlstra6e9a4732006-09-30 23:28:10 -07001100 DECLARE_COMPLETION_ONSTACK(done);
Li Shaohuae1367da2005-06-25 14:54:56 -07001101 struct warm_boot_cpu_info info;
Li Shaohuae1367da2005-06-25 14:54:56 -07001102 int apicid, ret;
Shaohua Libd9e0b72006-06-27 02:53:43 -07001103 struct Xgt_desc_struct *cpu_gdt_descr = &per_cpu(cpu_gdt_descr, cpu);
Li Shaohuae1367da2005-06-25 14:54:56 -07001104
Li Shaohuae1367da2005-06-25 14:54:56 -07001105 apicid = x86_cpu_to_apicid[cpu];
1106 if (apicid == BAD_APICID) {
1107 ret = -ENODEV;
1108 goto exit;
1109 }
1110
Shaohua Libd9e0b72006-06-27 02:53:43 -07001111 /*
1112 * the CPU isn't initialized at boot time, allocate gdt table here.
1113 * cpu_init will initialize it
1114 */
1115 if (!cpu_gdt_descr->address) {
1116 cpu_gdt_descr->address = get_zeroed_page(GFP_KERNEL);
1117 if (!cpu_gdt_descr->address)
1118 printk(KERN_CRIT "CPU%d failed to allocate GDT\n", cpu);
1119 ret = -ENOMEM;
1120 goto exit;
1121 }
1122
Li Shaohuae1367da2005-06-25 14:54:56 -07001123 info.complete = &done;
1124 info.apicid = apicid;
1125 info.cpu = cpu;
David Howellsc4028952006-11-22 14:57:56 +00001126 INIT_WORK(&info.task, do_warm_boot_cpu);
Li Shaohuae1367da2005-06-25 14:54:56 -07001127
1128 tsc_sync_disabled = 1;
1129
1130 /* init low mem mapping */
Zachary Amsdend7271b12005-09-03 15:56:50 -07001131 clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
Shaohua Li3b1bdf42006-12-08 02:41:13 -08001132 min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
Li Shaohuae1367da2005-06-25 14:54:56 -07001133 flush_tlb_all();
David Howellsc4028952006-11-22 14:57:56 +00001134 schedule_work(&info.task);
Li Shaohuae1367da2005-06-25 14:54:56 -07001135 wait_for_completion(&done);
1136
1137 tsc_sync_disabled = 0;
1138 zap_low_mappings();
1139 ret = 0;
1140exit:
Li Shaohuae1367da2005-06-25 14:54:56 -07001141 return ret;
1142}
1143#endif
1144
Adrian Bunkd9408ce2006-12-07 02:14:19 +01001145static void smp_tune_scheduling(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001146{
1147 unsigned long cachesize; /* kB */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001148
Adrian Bunkd9408ce2006-12-07 02:14:19 +01001149 if (cpu_khz) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150 cachesize = boot_cpu_data.x86_cache_size;
Adrian Bunkd9408ce2006-12-07 02:14:19 +01001151
1152 if (cachesize > 0)
1153 max_cache_size = cachesize * 1024;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001154 }
1155}
1156
1157/*
1158 * Cycle through the processors sending APIC IPIs to boot each.
1159 */
1160
1161static int boot_cpu_logical_apicid;
1162/* Where the IO area was mapped on multiquad, always 0 otherwise */
1163void *xquad_portio;
Alexey Dobriyan129f6942005-06-23 00:08:33 -07001164#ifdef CONFIG_X86_NUMAQ
1165EXPORT_SYMBOL(xquad_portio);
1166#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168static void __init smp_boot_cpus(unsigned int max_cpus)
1169{
1170 int apicid, cpu, bit, kicked;
1171 unsigned long bogosum = 0;
1172
1173 /*
1174 * Setup boot CPU information
1175 */
1176 smp_store_cpu_info(0); /* Final full version of the data */
1177 printk("CPU%d: ", 0);
1178 print_cpu_info(&cpu_data[0]);
1179
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001180 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181 boot_cpu_logical_apicid = logical_smp_processor_id();
1182 x86_cpu_to_apicid[0] = boot_cpu_physical_apicid;
1183
1184 current_thread_info()->cpu = 0;
1185 smp_tune_scheduling();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186
Siddha, Suresh B94605ef2005-11-05 17:25:54 +01001187 set_cpu_sibling_map(0);
Andi Kleen3dd9d512005-04-16 15:25:15 -07001188
Linus Torvalds1da177e2005-04-16 15:20:36 -07001189 /*
1190 * If we couldn't find an SMP configuration at boot time,
1191 * get out of here now!
1192 */
1193 if (!smp_found_config && !acpi_lapic) {
1194 printk(KERN_NOTICE "SMP motherboard not detected.\n");
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001195 smpboot_clear_io_apic_irqs();
1196 phys_cpu_present_map = physid_mask_of_physid(0);
1197 if (APIC_init_uniprocessor())
1198 printk(KERN_NOTICE "Local APIC not detected."
1199 " Using dummy APIC emulation.\n");
1200 map_cpu_to_logical_apicid();
1201 cpu_set(0, cpu_sibling_map[0]);
1202 cpu_set(0, cpu_core_map[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001203 return;
1204 }
1205
1206 /*
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001207 * Should not be necessary because the MP table should list the boot
1208 * CPU too, but we do it for the sake of robustness anyway.
1209 * Makes no sense to do this check in clustered apic mode, so skip it
Linus Torvalds1da177e2005-04-16 15:20:36 -07001210 */
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001211 if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
1212 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
1213 boot_cpu_physical_apicid);
1214 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1215 }
1216
1217 /*
1218 * If we couldn't find a local APIC, then get out of here now!
1219 */
1220 if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
1221 printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
1222 boot_cpu_physical_apicid);
1223 printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
1224 smpboot_clear_io_apic_irqs();
1225 phys_cpu_present_map = physid_mask_of_physid(0);
1226 cpu_set(0, cpu_sibling_map[0]);
1227 cpu_set(0, cpu_core_map[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001228 return;
1229 }
1230
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001231 verify_local_APIC();
1232
1233 /*
1234 * If SMP should be disabled, then really disable it!
1235 */
1236 if (!max_cpus) {
1237 smp_found_config = 0;
1238 printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
1239 smpboot_clear_io_apic_irqs();
1240 phys_cpu_present_map = physid_mask_of_physid(0);
1241 cpu_set(0, cpu_sibling_map[0]);
1242 cpu_set(0, cpu_core_map[0]);
1243 return;
1244 }
1245
1246 connect_bsp_APIC();
1247 setup_local_APIC();
1248 map_cpu_to_logical_apicid();
1249
1250
Linus Torvalds1da177e2005-04-16 15:20:36 -07001251 setup_portio_remap();
1252
1253 /*
1254 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
1255 *
1256 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
1257 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
1258 * clustered apic ID.
1259 */
1260 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map));
1261
1262 kicked = 1;
1263 for (bit = 0; kicked < NR_CPUS && bit < MAX_APICS; bit++) {
1264 apicid = cpu_present_to_apicid(bit);
1265 /*
1266 * Don't even attempt to start the boot CPU!
1267 */
1268 if ((apicid == boot_cpu_apicid) || (apicid == BAD_APICID))
1269 continue;
1270
1271 if (!check_apicid_present(bit))
1272 continue;
1273 if (max_cpus <= cpucount+1)
1274 continue;
1275
Li Shaohuae1367da2005-06-25 14:54:56 -07001276 if (((cpu = alloc_cpu_id()) <= 0) || do_boot_cpu(apicid, cpu))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001277 printk("CPU #%d not responding - cannot use it.\n",
1278 apicid);
1279 else
1280 ++kicked;
1281 }
1282
1283 /*
1284 * Cleanup possible dangling ends...
1285 */
1286 smpboot_restore_warm_reset_vector();
1287
1288 /*
1289 * Allow the user to impress friends.
1290 */
1291 Dprintk("Before bogomips.\n");
1292 for (cpu = 0; cpu < NR_CPUS; cpu++)
1293 if (cpu_isset(cpu, cpu_callout_map))
1294 bogosum += cpu_data[cpu].loops_per_jiffy;
1295 printk(KERN_INFO
1296 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
1297 cpucount+1,
1298 bogosum/(500000/HZ),
1299 (bogosum/(5000/HZ))%100);
1300
1301 Dprintk("Before bogocount - setting activated=1.\n");
1302
1303 if (smp_b_stepping)
1304 printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
1305
1306 /*
1307 * Don't taint if we are running SMP kernel on a single non-MP
1308 * approved Athlon
1309 */
1310 if (tainted & TAINT_UNSAFE_SMP) {
1311 if (cpucount)
1312 printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
1313 else
1314 tainted &= ~TAINT_UNSAFE_SMP;
1315 }
1316
1317 Dprintk("Boot done.\n");
1318
1319 /*
1320 * construct cpu_sibling_map[], so that we can tell sibling CPUs
1321 * efficiently.
1322 */
Andi Kleen3dd9d512005-04-16 15:25:15 -07001323 for (cpu = 0; cpu < NR_CPUS; cpu++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001324 cpus_clear(cpu_sibling_map[cpu]);
Andi Kleen3dd9d512005-04-16 15:25:15 -07001325 cpus_clear(cpu_core_map[cpu]);
1326 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001327
Li Shaohuad7208032005-06-25 14:54:54 -07001328 cpu_set(0, cpu_sibling_map[0]);
1329 cpu_set(0, cpu_core_map[0]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001330
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001331 smpboot_setup_io_apic();
1332
Zachary Amsdenbbab4f32007-02-13 13:26:21 +01001333 setup_boot_clock();
Linus Torvalds1e4c85f2005-10-31 19:16:17 -08001334
Linus Torvalds1da177e2005-04-16 15:20:36 -07001335 /*
1336 * Synchronize the TSC with the AP
1337 */
1338 if (cpu_has_tsc && cpucount && cpu_khz)
1339 synchronize_tsc_bp();
1340}
1341
1342/* These are wrappers to interface to the new boot process. Someone
1343 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
1344void __init smp_prepare_cpus(unsigned int max_cpus)
1345{
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001346 smp_commenced_mask = cpumask_of_cpu(0);
1347 cpu_callin_map = cpumask_of_cpu(0);
1348 mb();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001349 smp_boot_cpus(max_cpus);
1350}
1351
1352void __devinit smp_prepare_boot_cpu(void)
1353{
1354 cpu_set(smp_processor_id(), cpu_online_map);
1355 cpu_set(smp_processor_id(), cpu_callout_map);
Li Shaohuae1367da2005-06-25 14:54:56 -07001356 cpu_set(smp_processor_id(), cpu_present_map);
Zwane Mwaikambo4ad8d382005-09-03 15:56:51 -07001357 cpu_set(smp_processor_id(), cpu_possible_map);
Li Shaohuae1367da2005-06-25 14:54:56 -07001358 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001359}
1360
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001361#ifdef CONFIG_HOTPLUG_CPU
Li Shaohuae1367da2005-06-25 14:54:56 -07001362static void
1363remove_siblinginfo(int cpu)
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001364{
Li Shaohuae1367da2005-06-25 14:54:56 -07001365 int sibling;
Siddha, Suresh B94605ef2005-11-05 17:25:54 +01001366 struct cpuinfo_x86 *c = cpu_data;
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001367
Siddha, Suresh B94605ef2005-11-05 17:25:54 +01001368 for_each_cpu_mask(sibling, cpu_core_map[cpu]) {
1369 cpu_clear(cpu, cpu_core_map[sibling]);
1370 /*
1371 * last thread sibling in this cpu core going down
1372 */
1373 if (cpus_weight(cpu_sibling_map[cpu]) == 1)
1374 c[sibling].booted_cores--;
1375 }
1376
Li Shaohuae1367da2005-06-25 14:54:56 -07001377 for_each_cpu_mask(sibling, cpu_sibling_map[cpu])
1378 cpu_clear(cpu, cpu_sibling_map[sibling]);
Li Shaohuae1367da2005-06-25 14:54:56 -07001379 cpus_clear(cpu_sibling_map[cpu]);
1380 cpus_clear(cpu_core_map[cpu]);
Rohit Seth4b89aff2006-06-27 02:53:46 -07001381 c[cpu].phys_proc_id = 0;
1382 c[cpu].cpu_core_id = 0;
Siddha, Suresh B94605ef2005-11-05 17:25:54 +01001383 cpu_clear(cpu, cpu_sibling_setup_map);
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001384}
1385
1386int __cpu_disable(void)
1387{
1388 cpumask_t map = cpu_online_map;
1389 int cpu = smp_processor_id();
1390
1391 /*
1392 * Perhaps use cpufreq to drop frequency, but that could go
1393 * into generic code.
1394 *
1395 * We won't take down the boot processor on i386 due to some
1396 * interrupts only being able to be serviced by the BSP.
1397 * Especially so if we're not using an IOAPIC -zwane
1398 */
1399 if (cpu == 0)
1400 return -EBUSY;
Shaohua Li4038f902006-09-26 10:52:27 +02001401 if (nmi_watchdog == NMI_LOCAL_APIC)
1402 stop_apic_nmi_watchdog(NULL);
Shaohua Li5e9ef022005-12-12 22:17:08 -08001403 clear_local_APIC();
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001404 /* Allow any queued timer interrupts to get serviced */
1405 local_irq_enable();
1406 mdelay(1);
1407 local_irq_disable();
1408
Li Shaohuae1367da2005-06-25 14:54:56 -07001409 remove_siblinginfo(cpu);
1410
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001411 cpu_clear(cpu, map);
1412 fixup_irqs(map);
1413 /* It's now safe to remove this processor from the online map */
1414 cpu_clear(cpu, cpu_online_map);
1415 return 0;
1416}
1417
1418void __cpu_die(unsigned int cpu)
1419{
1420 /* We don't do anything here: idle task is faking death itself. */
1421 unsigned int i;
1422
1423 for (i = 0; i < 10; i++) {
1424 /* They ack this in play_dead by setting CPU_DEAD */
Li Shaohuae1367da2005-06-25 14:54:56 -07001425 if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
1426 printk ("CPU %d is now offline\n", cpu);
Gerd Hoffmann9a0b5812006-03-23 02:59:32 -08001427 if (1 == num_online_cpus())
1428 alternatives_smp_switch(0);
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001429 return;
Li Shaohuae1367da2005-06-25 14:54:56 -07001430 }
Nishanth Aravamudanaeb83972005-09-10 00:26:50 -07001431 msleep(100);
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001432 }
1433 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
1434}
1435#else /* ... !CONFIG_HOTPLUG_CPU */
1436int __cpu_disable(void)
1437{
1438 return -ENOSYS;
1439}
1440
1441void __cpu_die(unsigned int cpu)
1442{
1443 /* We said "no" in __cpu_disable */
1444 BUG();
1445}
1446#endif /* CONFIG_HOTPLUG_CPU */
1447
Vivek Goyal4a5d1072007-01-11 01:52:44 +01001448int __cpuinit __cpu_up(unsigned int cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001449{
Ashok Raj34f361a2006-03-25 03:08:18 -08001450#ifdef CONFIG_HOTPLUG_CPU
1451 int ret=0;
1452
1453 /*
1454 * We do warm boot only on cpus that had booted earlier
1455 * Otherwise cold boot is all handled from smp_boot_cpus().
1456 * cpu_callin_map is set during AP kickstart process. Its reset
1457 * when a cpu is taken offline from cpu_exit_clear().
1458 */
1459 if (!cpu_isset(cpu, cpu_callin_map))
1460 ret = __smp_prepare_cpu(cpu);
1461
1462 if (ret)
1463 return -EIO;
1464#endif
1465
Linus Torvalds1da177e2005-04-16 15:20:36 -07001466 /* In case one didn't come up */
1467 if (!cpu_isset(cpu, cpu_callin_map)) {
Zwane Mwaikambof3705132005-06-25 14:54:50 -07001468 printk(KERN_DEBUG "skipping cpu%d, didn't come online\n", cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001469 local_irq_enable();
1470 return -EIO;
1471 }
1472
Linus Torvalds1da177e2005-04-16 15:20:36 -07001473 local_irq_enable();
Li Shaohuae1367da2005-06-25 14:54:56 -07001474 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001475 /* Unleash the CPU! */
1476 cpu_set(cpu, smp_commenced_mask);
1477 while (!cpu_isset(cpu, cpu_online_map))
Andreas Mohr18698912006-06-25 05:46:52 -07001478 cpu_relax();
Siddha, Suresh Bb0d0a4b2006-12-07 02:14:10 +01001479
1480#ifdef CONFIG_X86_GENERICARCH
1481 if (num_online_cpus() > 8 && genapic == &apic_default)
1482 panic("Default flat APIC routing can't be used with > 8 cpus\n");
1483#endif
1484
Linus Torvalds1da177e2005-04-16 15:20:36 -07001485 return 0;
1486}
1487
1488void __init smp_cpus_done(unsigned int max_cpus)
1489{
1490#ifdef CONFIG_X86_IO_APIC
1491 setup_ioapic_dest();
1492#endif
1493 zap_low_mappings();
Li Shaohuae1367da2005-06-25 14:54:56 -07001494#ifndef CONFIG_HOTPLUG_CPU
Linus Torvalds1da177e2005-04-16 15:20:36 -07001495 /*
1496 * Disable executability of the SMP trampoline:
1497 */
1498 set_kernel_exec((unsigned long)trampoline_base, trampoline_exec);
Li Shaohuae1367da2005-06-25 14:54:56 -07001499#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001500}
1501
1502void __init smp_intr_init(void)
1503{
1504 /*
1505 * IRQ0 must be given a fixed assignment and initialized,
1506 * because it's used before the IO-APIC is set up.
1507 */
1508 set_intr_gate(FIRST_DEVICE_VECTOR, interrupt[0]);
1509
1510 /*
1511 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1512 * IPI, driven by wakeup.
1513 */
1514 set_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
1515
1516 /* IPI for invalidation */
1517 set_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
1518
1519 /* IPI for generic function call */
1520 set_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
1521}
Rusty Russell1a3f2392006-09-26 10:52:32 +02001522
1523/*
1524 * If the BIOS enumerates physical processors before logical,
1525 * maxcpus=N at enumeration-time can be used to disable HT.
1526 */
1527static int __init parse_maxcpus(char *arg)
1528{
1529 extern unsigned int maxcpus;
1530
1531 maxcpus = simple_strtoul(arg, NULL, 0);
1532 return 0;
1533}
1534early_param("maxcpus", parse_maxcpus);