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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 53d74fd79db19aae506de892273198b160c2ee95 / . / arch / arm / boot / dts / spear1310.dtsi
blob: 7cd25eb4f8e00a14c317fbbc46854bd7641bdeb9 [file] [log] [blame]
Viresh Kumar07658d9a62012-04-16 23:57:51 +0530[diff] [blame]1/*
2 * DTS file for all SPEAr1310 SoCs
3 *
Viresh Kumar10d89352012-06-20 12:53:02 -0700[diff] [blame]4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
Viresh Kumar07658d9a62012-04-16 23:57:51 +0530[diff] [blame]5 *
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/include/ "spear13xx.dtsi"
15
16/ {
17 compatible = "st,spear1310";
18
19 ahb {
20 ahci@b1000000 {
21 compatible = "snps,spear-ahci";
22 reg = <0xb1000000 0x10000>;
23 interrupts = <0 68 0x4>;
24 status = "disabled";
25 };
26
27 ahci@b1800000 {
28 compatible = "snps,spear-ahci";
29 reg = <0xb1800000 0x10000>;
30 interrupts = <0 69 0x4>;
31 status = "disabled";
32 };
33
34 ahci@b4000000 {
35 compatible = "snps,spear-ahci";
36 reg = <0xb4000000 0x10000>;
37 interrupts = <0 70 0x4>;
38 status = "disabled";
39 };
40
41 gmac1: eth@5c400000 {
42 compatible = "st,spear600-gmac";
43 reg = <0x5c400000 0x8000>;
44 interrupts = <0 95 0x4>;
45 interrupt-names = "macirq";
46 status = "disabled";
47 };
48
49 gmac2: eth@5c500000 {
50 compatible = "st,spear600-gmac";
51 reg = <0x5c500000 0x8000>;
52 interrupts = <0 96 0x4>;
53 interrupt-names = "macirq";
54 status = "disabled";
55 };
56
57 gmac3: eth@5c600000 {
58 compatible = "st,spear600-gmac";
59 reg = <0x5c600000 0x8000>;
60 interrupts = <0 97 0x4>;
61 interrupt-names = "macirq";
62 status = "disabled";
63 };
64
65 gmac4: eth@5c700000 {
66 compatible = "st,spear600-gmac";
67 reg = <0x5c700000 0x8000>;
68 interrupts = <0 98 0x4>;
69 interrupt-names = "macirq";
70 status = "disabled";
71 };
72
Viresh Kumar4ddb1c22012-10-27 15:21:39 +0530[diff] [blame]73 pinmux: pinmux@e0700000 {
74 compatible = "st,spear1310-pinmux";
75 reg = <0xe0700000 0x1000>;
76 #gpio-range-cells = <2>;
77 };
78
Viresh Kumar07658d9a62012-04-16 23:57:51 +0530[diff] [blame]79 spi1: spi@5d400000 {
80 compatible = "arm,pl022", "arm,primecell";
81 reg = <0x5d400000 0x1000>;
82 interrupts = <0 99 0x4>;
83 status = "disabled";
84 };
85
86 apb {
87 i2c1: i2c@5cd00000 {
88 #address-cells = <1>;
89 #size-cells = <0>;
90 compatible = "snps,designware-i2c";
91 reg = <0x5cd00000 0x1000>;
92 interrupts = <0 87 0x4>;
93 status = "disabled";
94 };
95
96 i2c2: i2c@5ce00000 {
97 #address-cells = <1>;
98 #size-cells = <0>;
99 compatible = "snps,designware-i2c";
100 reg = <0x5ce00000 0x1000>;
101 interrupts = <0 88 0x4>;
102 status = "disabled";
103 };
104
105 i2c3: i2c@5cf00000 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "snps,designware-i2c";
109 reg = <0x5cf00000 0x1000>;
110 interrupts = <0 89 0x4>;
111 status = "disabled";
112 };
113
114 i2c4: i2c@5d000000 {
115 #address-cells = <1>;
116 #size-cells = <0>;
117 compatible = "snps,designware-i2c";
118 reg = <0x5d000000 0x1000>;
119 interrupts = <0 90 0x4>;
120 status = "disabled";
121 };
122
123 i2c5: i2c@5d100000 {
124 #address-cells = <1>;
125 #size-cells = <0>;
126 compatible = "snps,designware-i2c";
127 reg = <0x5d100000 0x1000>;
128 interrupts = <0 91 0x4>;
129 status = "disabled";
130 };
131
132 i2c6: i2c@5d200000 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 compatible = "snps,designware-i2c";
136 reg = <0x5d200000 0x1000>;
137 interrupts = <0 92 0x4>;
138 status = "disabled";
139 };
140
141 i2c7: i2c@5d300000 {
142 #address-cells = <1>;
143 #size-cells = <0>;
144 compatible = "snps,designware-i2c";
145 reg = <0x5d300000 0x1000>;
146 interrupts = <0 93 0x4>;
147 status = "disabled";
148 };
149
150 serial@5c800000 {
151 compatible = "arm,pl011", "arm,primecell";
152 reg = <0x5c800000 0x1000>;
153 interrupts = <0 82 0x4>;
154 status = "disabled";
155 };
156
157 serial@5c900000 {
158 compatible = "arm,pl011", "arm,primecell";
159 reg = <0x5c900000 0x1000>;
160 interrupts = <0 83 0x4>;
161 status = "disabled";
162 };
163
164 serial@5ca00000 {
165 compatible = "arm,pl011", "arm,primecell";
166 reg = <0x5ca00000 0x1000>;
167 interrupts = <0 84 0x4>;
168 status = "disabled";
169 };
170
171 serial@5cb00000 {
172 compatible = "arm,pl011", "arm,primecell";
173 reg = <0x5cb00000 0x1000>;
174 interrupts = <0 85 0x4>;
175 status = "disabled";
176 };
177
178 serial@5cc00000 {
179 compatible = "arm,pl011", "arm,primecell";
180 reg = <0x5cc00000 0x1000>;
181 interrupts = <0 86 0x4>;
182 status = "disabled";
183 };
184
185 thermal@e07008c4 {
186 st,thermal-flags = <0x7000>;
187 };
Viresh Kumar4ddb1c22012-10-27 15:21:39 +0530[diff] [blame]188
189 gpiopinctrl: gpio@d8400000 {
190 compatible = "st,spear-plgpio";
191 reg = <0xd8400000 0x1000>;
192 interrupts = <0 100 0x4>;
193 #interrupt-cells = <1>;
194 interrupt-controller;
195 gpio-controller;
196 #gpio-cells = <2>;
197 gpio-ranges = <&pinmux 0 246>;
198 status = "disabled";
199
200 st-plgpio,ngpio = <246>;
201 st-plgpio,enb-reg = <0xd0>;
202 st-plgpio,wdata-reg = <0x90>;
203 st-plgpio,dir-reg = <0xb0>;
204 st-plgpio,ie-reg = <0x30>;
205 st-plgpio,rdata-reg = <0x70>;
206 st-plgpio,mis-reg = <0x10>;
207 st-plgpio,eit-reg = <0x50>;
208 };
Viresh Kumar07658d9a62012-04-16 23:57:51 +0530[diff] [blame]209 };
210 };
211};