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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 821093e1fd3c5e0b40601ffbd27f2d7692a7a1e6 / . / arch / arm / mach-omap2 / vc.h
blob: 5bf088633b62cf4f9ad3dc4513681a4225813718 [file] [log] [blame]
Thomas Gleixnerd2912cb2019-06-04 10:11:33 +0200[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0-only */
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]2/*
3 * OMAP3/4 Voltage Controller (VC) structure and macro definitions
4 *
5 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
6 * Rajendra Nayak <rnayak@ti.com>
7 * Lesly A M <x0080970@ti.com>
8 * Thara Gopinath <thara@ti.com>
9 *
10 * Copyright (C) 2008, 2011 Nokia Corporation
11 * Kalle Jokiniemi
12 * Paul Walmsley
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]13 */
14#ifndef __ARCH_ARM_MACH_OMAP2_VC_H
15#define __ARCH_ARM_MACH_OMAP2_VC_H
16
17#include <linux/kernel.h>
18
Kevin Hilmanccd5ca72011-03-21 14:08:55 -0700[diff] [blame]19struct voltagedomain;
20
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]21/**
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]22 * struct omap_vc_common - per-VC register/bitfield data
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]23 * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
24 * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]25 * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
26 * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
27 * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
28 * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
29 * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
30 * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
31 * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
32 * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame]33 * @i2c_cfg_reg: I2C configuration register offset
Tony Lindgren102bcb62015-05-04 08:54:41 -0700[diff] [blame]34 * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame]35 * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
36 * @i2c_mcode_mask: MCODE field mask for I2C config register
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]37 *
38 * XXX One of cmd_on_mask and cmd_on_shift are not needed
39 * XXX VALID should probably be a shift, not a mask
40 */
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]41struct omap_vc_common {
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]42 u32 cmd_on_mask;
43 u32 valid;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]44 u8 bypass_val_reg;
45 u8 data_shift;
46 u8 slaveaddr_shift;
47 u8 regaddr_shift;
48 u8 cmd_on_shift;
49 u8 cmd_onlp_shift;
50 u8 cmd_ret_shift;
51 u8 cmd_off_shift;
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame]52 u8 i2c_cfg_reg;
Tony Lindgren102bcb62015-05-04 08:54:41 -0700[diff] [blame]53 u8 i2c_cfg_clear_mask;
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame]54 u8 i2c_cfg_hsen_mask;
55 u8 i2c_mcode_mask;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]56};
57
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]58/* omap_vc_channel.flags values */
59#define OMAP_VC_CHANNEL_DEFAULT BIT(0)
Kevin Hilman8abc0b52011-06-02 17:28:13 -0700[diff] [blame]60#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1)
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]61
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]62/**
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]63 * struct omap_vc_channel - VC per-instance data
Kevin Hilmanba112a42011-03-29 14:02:36 -0700[diff] [blame]64 * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]65 * @volt_reg_addr: voltage configuration register address
66 * @cmd_reg_addr: command configuration register address
Kevin Hilman5892bb12011-03-29 14:36:04 -0700[diff] [blame]67 * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
Kevin Hilmance8ebe02011-03-30 11:01:10 -0700[diff] [blame]68 * @cfg_channel: current value of VC channel configuration register
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame]69 * @i2c_high_speed: whether or not to use I2C high-speed mode
Kevin Hilmance8ebe02011-03-30 11:01:10 -0700[diff] [blame]70 *
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]71 * @common: pointer to VC common data for this platform
Kevin Hilmanba112a42011-03-29 14:02:36 -0700[diff] [blame]72 * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]73 * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]74 * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
75 * @cmdval_reg: register for on/ret/off voltage level values for this channel
Kevin Hilman5876c942011-07-20 16:35:46 -0700[diff] [blame]76 * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
77 * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
78 * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
79 * @cfg_channel_reg: VC channel configuration register
Kevin Hilmance8ebe02011-03-30 11:01:10 -0700[diff] [blame]80 * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]81 * @flags: VC channel-specific flags (optional)
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]82 */
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]83struct omap_vc_channel {
Kevin Hilmanba112a42011-03-29 14:02:36 -0700[diff] [blame]84 /* channel state */
85 u16 i2c_slave_addr;
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]86 u16 volt_reg_addr;
87 u16 cmd_reg_addr;
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]88 u8 cfg_channel;
Kevin Hilmanf5395482011-03-30 16:36:30 -0700[diff] [blame]89 bool i2c_high_speed;
Kevin Hilmanba112a42011-03-29 14:02:36 -0700[diff] [blame]90
91 /* register access data */
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]92 const struct omap_vc_common *common;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]93 u32 smps_sa_mask;
94 u32 smps_volra_mask;
Kevin Hilmane4e021c2011-06-09 11:01:55 -0700[diff] [blame]95 u32 smps_cmdra_mask;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]96 u8 cmdval_reg;
Kevin Hilman5876c942011-07-20 16:35:46 -0700[diff] [blame]97 u8 smps_sa_reg;
98 u8 smps_volra_reg;
99 u8 smps_cmdra_reg;
100 u8 cfg_channel_reg;
Kevin Hilman24d31942011-03-29 15:57:16 -0700[diff] [blame]101 u8 cfg_channel_sa_shift;
102 u8 flags;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]103};
104
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]105extern struct omap_vc_channel omap3_vc_mpu;
106extern struct omap_vc_channel omap3_vc_core;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]107
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]108extern struct omap_vc_channel omap4_vc_mpu;
109extern struct omap_vc_channel omap4_vc_iva;
110extern struct omap_vc_channel omap4_vc_core;
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]111
Tero Kristo8b5d8c02012-09-25 19:33:35 +0300[diff] [blame]112extern struct omap_vc_param omap3_mpu_vc_data;
113extern struct omap_vc_param omap3_core_vc_data;
114
115extern struct omap_vc_param omap4_mpu_vc_data;
116extern struct omap_vc_param omap4_iva_vc_data;
117extern struct omap_vc_param omap4_core_vc_data;
118
Tony Lindgren3b8c4eb2014-05-05 17:27:35 -0700[diff] [blame]119void omap3_vc_set_pmic_signaling(int core_next_state);
120
121
Kevin Hilmanccd5ca72011-03-21 14:08:55 -0700[diff] [blame]122void omap_vc_init_channel(struct voltagedomain *voltdm);
123int omap_vc_pre_scale(struct voltagedomain *voltdm,
124 unsigned long target_volt,
125 u8 *target_vsel, u8 *current_vsel);
126void omap_vc_post_scale(struct voltagedomain *voltdm,
127 unsigned long target_volt,
128 u8 target_vsel, u8 current_vsel);
Kevin Hilmand84adcf2011-03-22 16:14:57 -0700[diff] [blame]129int omap_vc_bypass_scale(struct voltagedomain *voltdm,
130 unsigned long target_volt);
Kevin Hilmanccd5ca72011-03-21 14:08:55 -0700[diff] [blame]131
Paul Walmsleyc0718df2011-03-10 22:17:45 -0700[diff] [blame]132#endif
133