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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Paul Burton0752f922015-05-24 16:11:47 +01002/dts-v1/;
3
4#include "jz4780.dtsi"
Harvey Hunt8fec5532017-07-07 17:12:08 +01005#include <dt-bindings/gpio/gpio.h>
Paul Burton0752f922015-05-24 16:11:47 +01006
7/ {
8 compatible = "img,ci20", "ingenic,jz4780";
9
10 aliases {
11 serial0 = &uart0;
12 serial1 = &uart1;
13 serial3 = &uart3;
14 serial4 = &uart4;
15 };
16
17 chosen {
18 stdout-path = &uart4;
19 };
20
21 memory {
22 device_type = "memory";
23 reg = <0x0 0x10000000
24 0x30000000 0x30000000>;
25 };
Harvey Hunt8fec5532017-07-07 17:12:08 +010026
27 eth0_power: fixedregulator@0 {
28 compatible = "regulator-fixed";
29 regulator-name = "eth0_power";
30 gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
31 enable-active-high;
32 };
Paul Burton0752f922015-05-24 16:11:47 +010033};
34
35&ext {
36 clock-frequency = <48000000>;
37};
38
39&uart0 {
40 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020041
42 pinctrl-names = "default";
43 pinctrl-0 = <&pins_uart0>;
Paul Burton0752f922015-05-24 16:11:47 +010044};
45
46&uart1 {
47 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020048
49 pinctrl-names = "default";
50 pinctrl-0 = <&pins_uart1>;
Paul Burton0752f922015-05-24 16:11:47 +010051};
52
53&uart3 {
54 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020055
56 pinctrl-names = "default";
57 pinctrl-0 = <&pins_uart2>;
Paul Burton0752f922015-05-24 16:11:47 +010058};
59
60&uart4 {
61 status = "okay";
Paul Cercueil89a61392017-05-12 18:53:02 +020062
63 pinctrl-names = "default";
64 pinctrl-0 = <&pins_uart4>;
Paul Burton0752f922015-05-24 16:11:47 +010065};
Alex Smith78800552015-12-03 12:02:22 +000066
67&nemc {
68 status = "okay";
69
70 nandc: nand-controller@1 {
71 compatible = "ingenic,jz4780-nand";
72 reg = <1 0 0x1000000>;
73
74 #address-cells = <1>;
75 #size-cells = <0>;
76
77 ingenic,bch-controller = <&bch>;
78
79 ingenic,nemc-tAS = <10>;
80 ingenic,nemc-tAH = <5>;
81 ingenic,nemc-tBP = <10>;
82 ingenic,nemc-tAW = <15>;
83 ingenic,nemc-tSTRV = <100>;
84
Paul Cercueil89a61392017-05-12 18:53:02 +020085 /*
86 * Only CLE/ALE are needed for the devices that are connected, rather
87 * than the full address line set.
88 */
89 pinctrl-names = "default";
90 pinctrl-0 = <&pins_nemc>;
91
Alex Smith78800552015-12-03 12:02:22 +000092 nand@1 {
93 reg = <1>;
94
95 nand-ecc-step-size = <1024>;
96 nand-ecc-strength = <24>;
97 nand-ecc-mode = "hw";
98 nand-on-flash-bbt;
99
Paul Cercueil89a61392017-05-12 18:53:02 +0200100 pinctrl-names = "default";
101 pinctrl-0 = <&pins_nemc_cs1>;
102
Alex Smith78800552015-12-03 12:02:22 +0000103 partitions {
104 compatible = "fixed-partitions";
105 #address-cells = <2>;
106 #size-cells = <2>;
107
108 partition@0 {
109 label = "u-boot-spl";
110 reg = <0x0 0x0 0x0 0x800000>;
111 };
112
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100113 partition@800000 {
Alex Smith78800552015-12-03 12:02:22 +0000114 label = "u-boot";
115 reg = <0x0 0x800000 0x0 0x200000>;
116 };
117
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100118 partition@a00000 {
Alex Smith78800552015-12-03 12:02:22 +0000119 label = "u-boot-env";
120 reg = <0x0 0xa00000 0x0 0x200000>;
121 };
122
Mathieu Malaterrec7685192018-01-24 12:42:07 +0100123 partition@c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000124 label = "boot";
125 reg = <0x0 0xc00000 0x0 0x4000000>;
126 };
127
Mathieu Malaterre018eab82018-01-24 12:42:08 +0100128 partition@4c00000 {
Alex Smith78800552015-12-03 12:02:22 +0000129 label = "system";
130 reg = <0x0 0x4c00000 0x1 0xfb400000>;
131 };
132 };
133 };
134 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100135
136 dm9000@6 {
137 compatible = "davicom,dm9000";
138 davicom,no-eeprom;
139
140 pinctrl-names = "default";
141 pinctrl-0 = <&pins_nemc_cs6>;
142
143 reg = <6 0 1 /* addr */
144 6 2 1>; /* data */
145
146 ingenic,nemc-tAS = <15>;
147 ingenic,nemc-tAH = <10>;
148 ingenic,nemc-tBP = <20>;
149 ingenic,nemc-tAW = <50>;
150 ingenic,nemc-tSTRV = <100>;
151
152 reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
153 vcc-supply = <&eth0_power>;
154
155 interrupt-parent = <&gpe>;
156 interrupts = <19 4>;
157 };
Alex Smith78800552015-12-03 12:02:22 +0000158};
159
160&bch {
161 status = "okay";
162};
Paul Cercueil89a61392017-05-12 18:53:02 +0200163
164&pinctrl {
165 pins_uart0: uart0 {
166 function = "uart0";
167 groups = "uart0-data";
168 bias-disable;
169 };
170
171 pins_uart1: uart1 {
172 function = "uart1";
173 groups = "uart1-data";
174 bias-disable;
175 };
176
177 pins_uart2: uart2 {
178 function = "uart2";
179 groups = "uart2-data", "uart2-hwflow";
180 bias-disable;
181 };
182
183 pins_uart4: uart4 {
184 function = "uart4";
185 groups = "uart4-data";
186 bias-disable;
187 };
188
189 pins_nemc: nemc {
190 function = "nemc";
191 groups = "nemc-data", "nemc-cle-ale", "nemc-rd-we", "nemc-frd-fwe";
192 bias-disable;
193 };
194
195 pins_nemc_cs1: nemc-cs1 {
196 function = "nemc-cs1";
197 groups = "nemc-cs1";
198 bias-disable;
199 };
Harvey Hunt8fec5532017-07-07 17:12:08 +0100200
201 pins_nemc_cs6: nemc-cs6 {
202 function = "nemc-cs6";
203 groups = "nemc-cs6";
204 bias-disable;
205 };
Paul Cercueil89a61392017-05-12 18:53:02 +0200206};