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Lennert Buytenhek91da11f2008-10-07 13:44:02 +00001/*
2 * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
3 * Copyright (c) 2008 Marvell Semiconductor
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#ifndef __MV88E6XXX_H
12#define __MV88E6XXX_H
13
14#define REG_PORT(p) (0x10 + (p))
15#define REG_GLOBAL 0x1b
16#define REG_GLOBAL2 0x1c
17
18struct mv88e6xxx_priv_state {
Barry Grussling3675c8d2013-01-08 16:05:53 +000019 /* When using multi-chip addressing, this mutex protects
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000020 * access to the indirect access registers. (In single-chip
21 * mode, this mutex is effectively useless.)
22 */
23 struct mutex smi_mutex;
24
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000025#ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
Barry Grussling3675c8d2013-01-08 16:05:53 +000026 /* Handles automatic disabling and re-enabling of the PHY
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000027 * polling unit.
28 */
29 struct mutex ppu_mutex;
30 int ppu_disabled;
31 struct work_struct ppu_work;
32 struct timer_list ppu_timer;
33#endif
34
Barry Grussling3675c8d2013-01-08 16:05:53 +000035 /* This mutex serialises access to the statistics unit.
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000036 * Hold this mutex over snapshot + dump sequences.
37 */
38 struct mutex stats_mutex;
Peter Korsgaardec80bfc2011-04-05 03:03:56 +000039
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070040 /* This mutex serializes phy access for chips with
41 * indirect phy addressing. It is unused for chips
42 * with direct phy access.
43 */
44 struct mutex phy_mutex;
45
Peter Korsgaardec80bfc2011-04-05 03:03:56 +000046 int id; /* switch product id */
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000047};
48
49struct mv88e6xxx_hw_stat {
50 char string[ETH_GSTRING_LEN];
51 int sizeof_stat;
52 int reg;
53};
54
55int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
56int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
57int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
Barry Grussling85686582013-01-08 16:05:56 +000058 int reg, u16 val);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000059int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
60int mv88e6xxx_config_prio(struct dsa_switch *ds);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000061int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000062int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
63int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
64int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
Lennert Buytenhek2e5f0322008-10-07 13:45:18 +000065void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
66int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
67int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
68 int regnum, u16 val);
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000069void mv88e6xxx_poll_link(struct dsa_switch *ds);
70void mv88e6xxx_get_strings(struct dsa_switch *ds,
71 int nr_stats, struct mv88e6xxx_hw_stat *stats,
72 int port, uint8_t *data);
73void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
74 int nr_stats, struct mv88e6xxx_hw_stat *stats,
75 int port, uint64_t *data);
76
Ben Hutchings98e67302011-11-25 14:36:19 +000077extern struct dsa_switch_driver mv88e6131_switch_driver;
78extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
Guenter Roeck3ad50cc2014-10-29 10:44:56 -070079extern struct dsa_switch_driver mv88e6352_switch_driver;
Andrew Lunn42f27252014-09-12 23:58:44 +020080extern struct dsa_switch_driver mv88e6171_switch_driver;
Ben Hutchings98e67302011-11-25 14:36:19 +000081
Lennert Buytenhek91da11f2008-10-07 13:44:02 +000082#define REG_READ(addr, reg) \
83 ({ \
84 int __ret; \
85 \
86 __ret = mv88e6xxx_reg_read(ds, addr, reg); \
87 if (__ret < 0) \
88 return __ret; \
89 __ret; \
90 })
91
92#define REG_WRITE(addr, reg, val) \
93 ({ \
94 int __ret; \
95 \
96 __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
97 if (__ret < 0) \
98 return __ret; \
99 })
100
101
102
103#endif