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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 6b0e12a5c668c6b77c3e6d6c55c3ae7ed8bf5bd5 / . / sound / soc / mediatek / mt8192 / mt8192-mt6359-rt1015-rt5682.c
blob: 41d8a8567bb3856172400f57768fb00743024fa8 [file] [log] [blame]
Jiaxin Yu18b13ff2020-11-03 15:59:37 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2//
3// mt8192-mt6359-rt1015-rt5682.c --
4// MT8192-MT6359-RT1015-RT6358 ALSA SoC machine driver
5//
6// Copyright (c) 2020 MediaTek Inc.
7// Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
8//
9
10#include <linux/input.h>
11#include <linux/module.h>
12#include <linux/pm_runtime.h>
13#include <sound/jack.h>
14#include <sound/pcm_params.h>
15#include <sound/rt5682.h>
16#include <sound/soc.h>
17
18#include "../../codecs/mt6359.h"
19#include "../../codecs/rt1015.h"
20#include "../../codecs/rt5682.h"
21#include "../common/mtk-afe-platform-driver.h"
22#include "mt8192-afe-common.h"
23#include "mt8192-afe-clk.h"
24#include "mt8192-afe-gpio.h"
25
26#define RT1015_CODEC_DAI "rt1015-aif"
27#define RT1015_DEV0_NAME "rt1015.1-0028"
28#define RT1015_DEV1_NAME "rt1015.1-0029"
29
30#define RT5682_CODEC_DAI "rt5682-aif1"
31#define RT5682_DEV0_NAME "rt5682.1-001a"
32
33static struct snd_soc_jack headset_jack;
34
35static const struct snd_soc_dapm_widget
36mt8192_mt6359_rt1015_rt5682_widgets[] = {
37 SND_SOC_DAPM_SPK("Left Spk", NULL),
38 SND_SOC_DAPM_SPK("Right Spk", NULL),
39 SND_SOC_DAPM_HP("Headphone Jack", NULL),
40 SND_SOC_DAPM_MIC("Headset Mic", NULL),
41};
42
43static const struct snd_soc_dapm_route mt8192_mt6359_rt1015_rt5682_routes[] = {
44 /* speaker */
45 { "Left Spk", NULL, "Left SPO" },
46 { "Right Spk", NULL, "Right SPO" },
47 /* headset */
48 { "Headphone Jack", NULL, "HPOL" },
49 { "Headphone Jack", NULL, "HPOR" },
50 { "IN1P", NULL, "Headset Mic" },
51};
52
53static const struct snd_kcontrol_new mt8192_mt6359_rt1015_rt5682_controls[] = {
54 SOC_DAPM_PIN_SWITCH("Left Spk"),
55 SOC_DAPM_PIN_SWITCH("Right Spk"),
56 SOC_DAPM_PIN_SWITCH("Headphone Jack"),
57 SOC_DAPM_PIN_SWITCH("Headset Mic"),
58};
59
60static int mt8192_rt1015_i2s_hw_params(struct snd_pcm_substream *substream,
61 struct snd_pcm_hw_params *params)
62{
63 struct snd_soc_pcm_runtime *rtd = substream->private_data;
64 struct snd_soc_card *card = rtd->card;
65 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
66 struct snd_soc_dai *codec_dai;
67 unsigned int rate = params_rate(params);
68 unsigned int mclk_fs_ratio = 128;
69 unsigned int mclk_fs = rate * mclk_fs_ratio;
70 int ret, i;
71
72 for_each_rtd_codec_dais(rtd, i, codec_dai) {
73 ret = snd_soc_dai_set_bclk_ratio(codec_dai, 64);
74 if (ret) {
75 dev_err(card->dev, "failed to set bclk ratio\n");
76 return ret;
77 }
78
79 ret = snd_soc_dai_set_pll(codec_dai, 0,
80 RT1015_PLL_S_BCLK,
81 params_rate(params) * 64,
82 params_rate(params) * 256);
83 if (ret) {
84 dev_err(card->dev, "failed to set pll\n");
85 return ret;
86 }
87
88 ret = snd_soc_dai_set_sysclk(codec_dai,
89 RT1015_SCLK_S_PLL,
90 params_rate(params) * 256,
91 SND_SOC_CLOCK_IN);
92 if (ret) {
93 dev_err(card->dev, "failed to set sysclk\n");
94 return ret;
95 }
96 }
97
98 return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs, SND_SOC_CLOCK_OUT);
99}
100
101static int mt8192_rt5682_i2s_hw_params(struct snd_pcm_substream *substream,
102 struct snd_pcm_hw_params *params)
103{
104 struct snd_soc_pcm_runtime *rtd = substream->private_data;
105 struct snd_soc_card *card = rtd->card;
106 struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
107 struct snd_soc_dai *codec_dai = asoc_rtd_to_codec(rtd, 0);
108 unsigned int rate = params_rate(params);
109 unsigned int mclk_fs_ratio = 128;
110 unsigned int mclk_fs = rate * mclk_fs_ratio;
111 int bitwidth;
112 int ret;
113
114 bitwidth = snd_pcm_format_width(params_format(params));
115 if (bitwidth < 0) {
116 dev_err(card->dev, "invalid bit width: %d\n", bitwidth);
117 return bitwidth;
118 }
119
120 ret = snd_soc_dai_set_tdm_slot(codec_dai, 0x00, 0x0, 0x2, bitwidth);
121 if (ret) {
122 dev_err(card->dev, "failed to set tdm slot\n");
123 return ret;
124 }
125
126 ret = snd_soc_dai_set_pll(codec_dai, RT5682_PLL1,
127 RT5682_PLL1_S_BCLK1,
128 params_rate(params) * 64,
129 params_rate(params) * 512);
130 if (ret) {
131 dev_err(card->dev, "failed to set pll\n");
132 return ret;
133 }
134
135 ret = snd_soc_dai_set_sysclk(codec_dai,
136 RT5682_SCLK_S_PLL1,
137 params_rate(params) * 512,
138 SND_SOC_CLOCK_IN);
139 if (ret) {
140 dev_err(card->dev, "failed to set sysclk\n");
141 return ret;
142 }
143
144 return snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs, SND_SOC_CLOCK_OUT);
145}
146
147static const struct snd_soc_ops mt8192_rt1015_i2s_ops = {
148 .hw_params = mt8192_rt1015_i2s_hw_params,
149};
150
151static const struct snd_soc_ops mt8192_rt5682_i2s_ops = {
152 .hw_params = mt8192_rt5682_i2s_hw_params,
153};
154
155static int mt8192_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd)
156{
157 struct snd_soc_component *cmpnt_afe =
158 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
159 struct snd_soc_component *cmpnt_codec =
160 asoc_rtd_to_codec(rtd, 0)->component;
161 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
162 struct mt8192_afe_private *afe_priv = afe->platform_priv;
163 int phase;
164 unsigned int monitor;
165 int test_done_1, test_done_2, test_done_3;
166 int cycle_1, cycle_2, cycle_3;
167 int prev_cycle_1, prev_cycle_2, prev_cycle_3;
168 int chosen_phase_1, chosen_phase_2, chosen_phase_3;
169 int counter;
170 int mtkaif_calib_ok;
171
172 dev_info(afe->dev, "%s(), start\n", __func__);
173
174 pm_runtime_get_sync(afe->dev);
175 mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA, 1);
176 mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA, 0);
177 mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA_CH34, 1);
178 mt8192_afe_gpio_request(afe->dev, true, MT8192_DAI_ADDA_CH34, 0);
179
180 mt6359_mtkaif_calibration_enable(cmpnt_codec);
181
182 /* set clock protocol 2 */
183 regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, 0xff, 0x38);
184 regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, 0xff, 0x39);
185
186 /* set test type to synchronizer pulse */
187 regmap_update_bits(afe_priv->topckgen,
188 CKSYS_AUD_TOP_CFG, 0xffff, 0x4);
189
190 mtkaif_calib_ok = true;
191 afe_priv->mtkaif_calibration_num_phase = 42; /* mt6359: 0 ~ 42 */
192 afe_priv->mtkaif_chosen_phase[0] = -1;
193 afe_priv->mtkaif_chosen_phase[1] = -1;
194 afe_priv->mtkaif_chosen_phase[2] = -1;
195
196 for (phase = 0;
197 phase <= afe_priv->mtkaif_calibration_num_phase &&
198 mtkaif_calib_ok;
199 phase++) {
200 mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
201 phase, phase, phase);
202
203 regmap_update_bits(afe_priv->topckgen,
204 CKSYS_AUD_TOP_CFG, 0x1, 0x1);
205
206 test_done_1 = 0;
207 test_done_2 = 0;
208 test_done_3 = 0;
209 cycle_1 = -1;
210 cycle_2 = -1;
211 cycle_3 = -1;
212 counter = 0;
213 while (test_done_1 == 0 ||
214 test_done_2 == 0 ||
215 test_done_3 == 0) {
216 regmap_read(afe_priv->topckgen,
217 CKSYS_AUD_TOP_MON, &monitor);
218
219 test_done_1 = (monitor >> 28) & 0x1;
220 test_done_2 = (monitor >> 29) & 0x1;
221 test_done_3 = (monitor >> 30) & 0x1;
222 if (test_done_1 == 1)
223 cycle_1 = monitor & 0xf;
224
225 if (test_done_2 == 1)
226 cycle_2 = (monitor >> 4) & 0xf;
227
228 if (test_done_3 == 1)
229 cycle_3 = (monitor >> 8) & 0xf;
230
231 /* handle if never test done */
232 if (++counter > 10000) {
233 dev_err(afe->dev, "%s(), test fail, cycle_1 %d, cycle_2 %d, cycle_3 %d, monitor 0x%x\n",
234 __func__,
235 cycle_1, cycle_2, cycle_3, monitor);
236 mtkaif_calib_ok = false;
237 break;
238 }
239 }
240
241 if (phase == 0) {
242 prev_cycle_1 = cycle_1;
243 prev_cycle_2 = cycle_2;
244 prev_cycle_3 = cycle_3;
245 }
246
247 if (cycle_1 != prev_cycle_1 &&
248 afe_priv->mtkaif_chosen_phase[0] < 0) {
249 afe_priv->mtkaif_chosen_phase[0] = phase - 1;
250 afe_priv->mtkaif_phase_cycle[0] = prev_cycle_1;
251 }
252
253 if (cycle_2 != prev_cycle_2 &&
254 afe_priv->mtkaif_chosen_phase[1] < 0) {
255 afe_priv->mtkaif_chosen_phase[1] = phase - 1;
256 afe_priv->mtkaif_phase_cycle[1] = prev_cycle_2;
257 }
258
259 if (cycle_3 != prev_cycle_3 &&
260 afe_priv->mtkaif_chosen_phase[2] < 0) {
261 afe_priv->mtkaif_chosen_phase[2] = phase - 1;
262 afe_priv->mtkaif_phase_cycle[2] = prev_cycle_3;
263 }
264
265 regmap_update_bits(afe_priv->topckgen,
266 CKSYS_AUD_TOP_CFG, 0x1, 0x0);
267
268 if (afe_priv->mtkaif_chosen_phase[0] >= 0 &&
269 afe_priv->mtkaif_chosen_phase[1] >= 0 &&
270 afe_priv->mtkaif_chosen_phase[2] >= 0)
271 break;
272 }
273
274 if (afe_priv->mtkaif_chosen_phase[0] < 0)
275 chosen_phase_1 = 0;
276 else
277 chosen_phase_1 = afe_priv->mtkaif_chosen_phase[0];
278
279 if (afe_priv->mtkaif_chosen_phase[1] < 0)
280 chosen_phase_2 = 0;
281 else
282 chosen_phase_2 = afe_priv->mtkaif_chosen_phase[1];
283
284 if (afe_priv->mtkaif_chosen_phase[2] < 0)
285 chosen_phase_3 = 0;
286 else
287 chosen_phase_3 = afe_priv->mtkaif_chosen_phase[2];
288
289 mt6359_set_mtkaif_calibration_phase(cmpnt_codec,
290 chosen_phase_1,
291 chosen_phase_2,
292 chosen_phase_3);
293
294 /* disable rx fifo */
295 regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, 0xff, 0x38);
296
297 mt6359_mtkaif_calibration_disable(cmpnt_codec);
298
299 mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA, 1);
300 mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA, 0);
301 mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA_CH34, 1);
302 mt8192_afe_gpio_request(afe->dev, false, MT8192_DAI_ADDA_CH34, 0);
303 pm_runtime_put(afe->dev);
304
305 dev_info(afe->dev, "%s(), mtkaif_chosen_phase[0/1/2]:%d/%d/%d\n",
306 __func__,
307 afe_priv->mtkaif_chosen_phase[0],
308 afe_priv->mtkaif_chosen_phase[1],
309 afe_priv->mtkaif_chosen_phase[2]);
310
311 return 0;
312}
313
314static int mt8192_mt6359_init(struct snd_soc_pcm_runtime *rtd)
315{
316 struct snd_soc_component *cmpnt_afe =
317 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
318 struct snd_soc_component *cmpnt_codec =
319 asoc_rtd_to_codec(rtd, 0)->component;
320 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
321 struct mt8192_afe_private *afe_priv = afe->platform_priv;
322
323 /* set mtkaif protocol */
324 mt6359_set_mtkaif_protocol(cmpnt_codec,
325 MT6359_MTKAIF_PROTOCOL_2_CLK_P2);
326 afe_priv->mtkaif_protocol = MTKAIF_PROTOCOL_2_CLK_P2;
327
328 /* mtkaif calibration */
329 mt8192_mt6359_mtkaif_calibration(rtd);
330
331 return 0;
332}
333
334static int mt8192_rt5682_init(struct snd_soc_pcm_runtime *rtd)
335{
336 struct snd_soc_component *cmpnt_codec =
337 asoc_rtd_to_codec(rtd, 0)->component;
338 struct snd_soc_jack *jack = &headset_jack;
339 int ret;
340
341 ret = snd_soc_card_jack_new(rtd->card, "Headset Jack",
342 SND_JACK_HEADSET | SND_JACK_BTN_0 |
343 SND_JACK_BTN_1 | SND_JACK_BTN_2 |
344 SND_JACK_BTN_3,
345 jack, NULL, 0);
346 if (ret) {
347 dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret);
348 return ret;
349 }
350
351 snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
352 snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND);
353 snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP);
354 snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN);
355
356 ret = snd_soc_component_set_jack(cmpnt_codec, jack, NULL);
357 if (ret) {
358 dev_err(rtd->dev, "Headset Jack set failed: %d\n", ret);
359 return ret;
360 }
361
362 return 0;
363};
364
365static int mt8192_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
366 struct snd_pcm_hw_params *params)
367{
368 /* fix BE i2s format to 32bit, clean param mask first */
369 snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT),
370 0, SNDRV_PCM_FORMAT_LAST);
371
372 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
373
374 return 0;
375}
376
377static int
378mt8192_mt6359_rt1015_rt5682_cap1_startup(struct snd_pcm_substream *substream)
379{
380 struct snd_soc_pcm_runtime *rtd = substream->private_data;
381 struct snd_soc_component *component =
382 snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
383 struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component);
384 int ret;
385
386 static const unsigned int channels[] = {
387 1, 2, 4
388 };
389 static const struct snd_pcm_hw_constraint_list constraints_channels = {
390 .count = ARRAY_SIZE(channels),
391 .list = channels,
392 .mask = 0,
393 };
394 static const unsigned int rates[] = {
395 8000, 16000, 32000, 48000, 96000, 192000
396 };
397 static const struct snd_pcm_hw_constraint_list constraints_rates = {
398 .count = ARRAY_SIZE(rates),
399 .list = rates,
400 .mask = 0,
401 };
402
403 struct snd_pcm_runtime *runtime = substream->runtime;
404
405 ret = snd_pcm_hw_constraint_list(runtime, 0,
406 SNDRV_PCM_HW_PARAM_CHANNELS,
407 &constraints_channels);
408 if (ret < 0) {
409 dev_err(afe->dev, "hw_constraint_list channels failed\n");
410 return ret;
411 }
412
413 ret = snd_pcm_hw_constraint_list(runtime, 0,
414 SNDRV_PCM_HW_PARAM_RATE,
415 &constraints_rates);
416 if (ret < 0) {
417 dev_err(afe->dev, "hw_constraint_list rate failed\n");
418 return ret;
419 }
420
421 return 0;
422}
423
424static const struct snd_soc_ops mt8192_mt6359_rt1015_rt5682_capture1_ops = {
425 .startup = mt8192_mt6359_rt1015_rt5682_cap1_startup,
426};
427
428/* FE */
429SND_SOC_DAILINK_DEFS(playback1,
430 DAILINK_COMP_ARRAY(COMP_CPU("DL1")),
431 DAILINK_COMP_ARRAY(COMP_DUMMY()),
432 DAILINK_COMP_ARRAY(COMP_EMPTY()));
433
434SND_SOC_DAILINK_DEFS(playback12,
435 DAILINK_COMP_ARRAY(COMP_CPU("DL12")),
436 DAILINK_COMP_ARRAY(COMP_DUMMY()),
437 DAILINK_COMP_ARRAY(COMP_EMPTY()));
438
439SND_SOC_DAILINK_DEFS(playback2,
440 DAILINK_COMP_ARRAY(COMP_CPU("DL2")),
441 DAILINK_COMP_ARRAY(COMP_DUMMY()),
442 DAILINK_COMP_ARRAY(COMP_EMPTY()));
443
444SND_SOC_DAILINK_DEFS(playback3,
445 DAILINK_COMP_ARRAY(COMP_CPU("DL3")),
446 DAILINK_COMP_ARRAY(COMP_DUMMY()),
447 DAILINK_COMP_ARRAY(COMP_EMPTY()));
448
449SND_SOC_DAILINK_DEFS(playback4,
450 DAILINK_COMP_ARRAY(COMP_CPU("DL4")),
451 DAILINK_COMP_ARRAY(COMP_DUMMY()),
452 DAILINK_COMP_ARRAY(COMP_EMPTY()));
453
454SND_SOC_DAILINK_DEFS(playback5,
455 DAILINK_COMP_ARRAY(COMP_CPU("DL5")),
456 DAILINK_COMP_ARRAY(COMP_DUMMY()),
457 DAILINK_COMP_ARRAY(COMP_EMPTY()));
458
459SND_SOC_DAILINK_DEFS(playback6,
460 DAILINK_COMP_ARRAY(COMP_CPU("DL6")),
461 DAILINK_COMP_ARRAY(COMP_DUMMY()),
462 DAILINK_COMP_ARRAY(COMP_EMPTY()));
463
464SND_SOC_DAILINK_DEFS(playback7,
465 DAILINK_COMP_ARRAY(COMP_CPU("DL7")),
466 DAILINK_COMP_ARRAY(COMP_DUMMY()),
467 DAILINK_COMP_ARRAY(COMP_EMPTY()));
468
469SND_SOC_DAILINK_DEFS(playback8,
470 DAILINK_COMP_ARRAY(COMP_CPU("DL8")),
471 DAILINK_COMP_ARRAY(COMP_DUMMY()),
472 DAILINK_COMP_ARRAY(COMP_EMPTY()));
473
474SND_SOC_DAILINK_DEFS(playback9,
475 DAILINK_COMP_ARRAY(COMP_CPU("DL9")),
476 DAILINK_COMP_ARRAY(COMP_DUMMY()),
477 DAILINK_COMP_ARRAY(COMP_EMPTY()));
478
479SND_SOC_DAILINK_DEFS(capture1,
480 DAILINK_COMP_ARRAY(COMP_CPU("UL1")),
481 DAILINK_COMP_ARRAY(COMP_DUMMY()),
482 DAILINK_COMP_ARRAY(COMP_EMPTY()));
483
484SND_SOC_DAILINK_DEFS(capture2,
485 DAILINK_COMP_ARRAY(COMP_CPU("UL2")),
486 DAILINK_COMP_ARRAY(COMP_DUMMY()),
487 DAILINK_COMP_ARRAY(COMP_EMPTY()));
488
489SND_SOC_DAILINK_DEFS(capture3,
490 DAILINK_COMP_ARRAY(COMP_CPU("UL3")),
491 DAILINK_COMP_ARRAY(COMP_DUMMY()),
492 DAILINK_COMP_ARRAY(COMP_EMPTY()));
493
494SND_SOC_DAILINK_DEFS(capture4,
495 DAILINK_COMP_ARRAY(COMP_CPU("UL4")),
496 DAILINK_COMP_ARRAY(COMP_DUMMY()),
497 DAILINK_COMP_ARRAY(COMP_EMPTY()));
498
499SND_SOC_DAILINK_DEFS(capture5,
500 DAILINK_COMP_ARRAY(COMP_CPU("UL5")),
501 DAILINK_COMP_ARRAY(COMP_DUMMY()),
502 DAILINK_COMP_ARRAY(COMP_EMPTY()));
503
504SND_SOC_DAILINK_DEFS(capture6,
505 DAILINK_COMP_ARRAY(COMP_CPU("UL6")),
506 DAILINK_COMP_ARRAY(COMP_DUMMY()),
507 DAILINK_COMP_ARRAY(COMP_EMPTY()));
508
509SND_SOC_DAILINK_DEFS(capture7,
510 DAILINK_COMP_ARRAY(COMP_CPU("UL7")),
511 DAILINK_COMP_ARRAY(COMP_DUMMY()),
512 DAILINK_COMP_ARRAY(COMP_EMPTY()));
513
514SND_SOC_DAILINK_DEFS(capture8,
515 DAILINK_COMP_ARRAY(COMP_CPU("UL8")),
516 DAILINK_COMP_ARRAY(COMP_DUMMY()),
517 DAILINK_COMP_ARRAY(COMP_EMPTY()));
518
519SND_SOC_DAILINK_DEFS(capture_mono1,
520 DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_1")),
521 DAILINK_COMP_ARRAY(COMP_DUMMY()),
522 DAILINK_COMP_ARRAY(COMP_EMPTY()));
523
524SND_SOC_DAILINK_DEFS(capture_mono2,
525 DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_2")),
526 DAILINK_COMP_ARRAY(COMP_DUMMY()),
527 DAILINK_COMP_ARRAY(COMP_EMPTY()));
528
529SND_SOC_DAILINK_DEFS(capture_mono3,
530 DAILINK_COMP_ARRAY(COMP_CPU("UL_MONO_3")),
531 DAILINK_COMP_ARRAY(COMP_DUMMY()),
532 DAILINK_COMP_ARRAY(COMP_EMPTY()));
533
534SND_SOC_DAILINK_DEFS(playback_hdmi,
535 DAILINK_COMP_ARRAY(COMP_CPU("HDMI")),
536 DAILINK_COMP_ARRAY(COMP_DUMMY()),
537 DAILINK_COMP_ARRAY(COMP_EMPTY()));
538
539/* BE */
540SND_SOC_DAILINK_DEFS(primary_codec,
541 DAILINK_COMP_ARRAY(COMP_CPU("ADDA")),
542 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
543 "mt6359-snd-codec-aif1")),
544 DAILINK_COMP_ARRAY(COMP_EMPTY()));
545
546SND_SOC_DAILINK_DEFS(primary_codec_ch34,
547 DAILINK_COMP_ARRAY(COMP_CPU("ADDA_CH34")),
548 DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound",
549 "mt6359-snd-codec-aif2")),
550 DAILINK_COMP_ARRAY(COMP_EMPTY()));
551
552SND_SOC_DAILINK_DEFS(ap_dmic,
553 DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC")),
554 DAILINK_COMP_ARRAY(COMP_DUMMY()),
555 DAILINK_COMP_ARRAY(COMP_EMPTY()));
556
557SND_SOC_DAILINK_DEFS(ap_dmic_ch34,
558 DAILINK_COMP_ARRAY(COMP_CPU("AP_DMIC_CH34")),
559 DAILINK_COMP_ARRAY(COMP_DUMMY()),
560 DAILINK_COMP_ARRAY(COMP_EMPTY()));
561
562SND_SOC_DAILINK_DEFS(i2s0,
563 DAILINK_COMP_ARRAY(COMP_CPU("I2S0")),
564 DAILINK_COMP_ARRAY(COMP_DUMMY()),
565 DAILINK_COMP_ARRAY(COMP_EMPTY()));
566
567SND_SOC_DAILINK_DEFS(i2s1,
568 DAILINK_COMP_ARRAY(COMP_CPU("I2S1")),
569 DAILINK_COMP_ARRAY(COMP_DUMMY()),
570 DAILINK_COMP_ARRAY(COMP_EMPTY()));
571
572SND_SOC_DAILINK_DEFS(i2s2,
573 DAILINK_COMP_ARRAY(COMP_CPU("I2S2")),
574 DAILINK_COMP_ARRAY(COMP_DUMMY()),
575 DAILINK_COMP_ARRAY(COMP_EMPTY()));
576
577SND_SOC_DAILINK_DEFS(i2s3,
578 DAILINK_COMP_ARRAY(COMP_CPU("I2S3")),
579 DAILINK_COMP_ARRAY(COMP_CODEC(RT1015_DEV0_NAME,
580 RT1015_CODEC_DAI),
581 COMP_CODEC(RT1015_DEV1_NAME,
582 RT1015_CODEC_DAI)),
583 DAILINK_COMP_ARRAY(COMP_EMPTY()));
584
585SND_SOC_DAILINK_DEFS(i2s5,
586 DAILINK_COMP_ARRAY(COMP_CPU("I2S5")),
587 DAILINK_COMP_ARRAY(COMP_DUMMY()),
588 DAILINK_COMP_ARRAY(COMP_EMPTY()));
589
590SND_SOC_DAILINK_DEFS(i2s6,
591 DAILINK_COMP_ARRAY(COMP_CPU("I2S6")),
592 DAILINK_COMP_ARRAY(COMP_DUMMY()),
593 DAILINK_COMP_ARRAY(COMP_EMPTY()));
594
595SND_SOC_DAILINK_DEFS(i2s7,
596 DAILINK_COMP_ARRAY(COMP_CPU("I2S7")),
597 DAILINK_COMP_ARRAY(COMP_DUMMY()),
598 DAILINK_COMP_ARRAY(COMP_EMPTY()));
599
600SND_SOC_DAILINK_DEFS(i2s8,
601 DAILINK_COMP_ARRAY(COMP_CPU("I2S8")),
602 DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME,
603 RT5682_CODEC_DAI)),
604 DAILINK_COMP_ARRAY(COMP_EMPTY()));
605
606SND_SOC_DAILINK_DEFS(i2s9,
607 DAILINK_COMP_ARRAY(COMP_CPU("I2S9")),
608 DAILINK_COMP_ARRAY(COMP_CODEC(RT5682_DEV0_NAME,
609 RT5682_CODEC_DAI)),
610 DAILINK_COMP_ARRAY(COMP_EMPTY()));
611
612SND_SOC_DAILINK_DEFS(connsys_i2s,
613 DAILINK_COMP_ARRAY(COMP_CPU("CONNSYS_I2S")),
614 DAILINK_COMP_ARRAY(COMP_DUMMY()),
615 DAILINK_COMP_ARRAY(COMP_EMPTY()));
616
617SND_SOC_DAILINK_DEFS(pcm1,
618 DAILINK_COMP_ARRAY(COMP_CPU("PCM 1")),
619 DAILINK_COMP_ARRAY(COMP_DUMMY()),
620 DAILINK_COMP_ARRAY(COMP_EMPTY()));
621
622SND_SOC_DAILINK_DEFS(pcm2,
623 DAILINK_COMP_ARRAY(COMP_CPU("PCM 2")),
624 DAILINK_COMP_ARRAY(COMP_DUMMY()),
625 DAILINK_COMP_ARRAY(COMP_EMPTY()));
626
627SND_SOC_DAILINK_DEFS(tdm,
628 DAILINK_COMP_ARRAY(COMP_CPU("TDM")),
629 DAILINK_COMP_ARRAY(COMP_DUMMY()),
630 DAILINK_COMP_ARRAY(COMP_EMPTY()));
631
632static struct snd_soc_dai_link mt8192_mt6359_rt1015_rt5682_dai_links[] = {
633 /* Front End DAI links */
634 {
635 .name = "Playback_1",
636 .stream_name = "Playback_1",
637 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
638 SND_SOC_DPCM_TRIGGER_PRE},
639 .dynamic = 1,
640 .dpcm_playback = 1,
641 SND_SOC_DAILINK_REG(playback1),
642 },
643 {
644 .name = "Playback_12",
645 .stream_name = "Playback_12",
646 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
647 SND_SOC_DPCM_TRIGGER_PRE},
648 .dynamic = 1,
649 .dpcm_playback = 1,
650 SND_SOC_DAILINK_REG(playback12),
651 },
652 {
653 .name = "Playback_2",
654 .stream_name = "Playback_2",
655 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
656 SND_SOC_DPCM_TRIGGER_PRE},
657 .dynamic = 1,
658 .dpcm_playback = 1,
659 SND_SOC_DAILINK_REG(playback2),
660 },
661 {
662 .name = "Playback_3",
663 .stream_name = "Playback_3",
664 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
665 SND_SOC_DPCM_TRIGGER_PRE},
666 .dynamic = 1,
667 .dpcm_playback = 1,
668 SND_SOC_DAILINK_REG(playback3),
669 },
670 {
671 .name = "Playback_4",
672 .stream_name = "Playback_4",
673 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
674 SND_SOC_DPCM_TRIGGER_PRE},
675 .dynamic = 1,
676 .dpcm_playback = 1,
677 SND_SOC_DAILINK_REG(playback4),
678 },
679 {
680 .name = "Playback_5",
681 .stream_name = "Playback_5",
682 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
683 SND_SOC_DPCM_TRIGGER_PRE},
684 .dynamic = 1,
685 .dpcm_playback = 1,
686 SND_SOC_DAILINK_REG(playback5),
687 },
688 {
689 .name = "Playback_6",
690 .stream_name = "Playback_6",
691 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
692 SND_SOC_DPCM_TRIGGER_PRE},
693 .dynamic = 1,
694 .dpcm_playback = 1,
695 SND_SOC_DAILINK_REG(playback6),
696 },
697 {
698 .name = "Playback_7",
699 .stream_name = "Playback_7",
700 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
701 SND_SOC_DPCM_TRIGGER_PRE},
702 .dynamic = 1,
703 .dpcm_playback = 1,
704 SND_SOC_DAILINK_REG(playback7),
705 },
706 {
707 .name = "Playback_8",
708 .stream_name = "Playback_8",
709 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
710 SND_SOC_DPCM_TRIGGER_PRE},
711 .dynamic = 1,
712 .dpcm_playback = 1,
713 SND_SOC_DAILINK_REG(playback8),
714 },
715 {
716 .name = "Playback_9",
717 .stream_name = "Playback_9",
718 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
719 SND_SOC_DPCM_TRIGGER_PRE},
720 .dynamic = 1,
721 .dpcm_playback = 1,
722 SND_SOC_DAILINK_REG(playback9),
723 },
724 {
725 .name = "Capture_1",
726 .stream_name = "Capture_1",
727 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
728 SND_SOC_DPCM_TRIGGER_PRE},
729 .dynamic = 1,
730 .dpcm_capture = 1,
731 .ops = &mt8192_mt6359_rt1015_rt5682_capture1_ops,
732 SND_SOC_DAILINK_REG(capture1),
733 },
734 {
735 .name = "Capture_2",
736 .stream_name = "Capture_2",
737 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
738 SND_SOC_DPCM_TRIGGER_PRE},
739 .dynamic = 1,
740 .dpcm_capture = 1,
741 SND_SOC_DAILINK_REG(capture2),
742 },
743 {
744 .name = "Capture_3",
745 .stream_name = "Capture_3",
746 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
747 SND_SOC_DPCM_TRIGGER_PRE},
748 .dynamic = 1,
749 .dpcm_capture = 1,
750 SND_SOC_DAILINK_REG(capture3),
751 },
752 {
753 .name = "Capture_4",
754 .stream_name = "Capture_4",
755 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
756 SND_SOC_DPCM_TRIGGER_PRE},
757 .dynamic = 1,
758 .dpcm_capture = 1,
759 SND_SOC_DAILINK_REG(capture4),
760 },
761 {
762 .name = "Capture_5",
763 .stream_name = "Capture_5",
764 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
765 SND_SOC_DPCM_TRIGGER_PRE},
766 .dynamic = 1,
767 .dpcm_capture = 1,
768 SND_SOC_DAILINK_REG(capture5),
769 },
770 {
771 .name = "Capture_6",
772 .stream_name = "Capture_6",
773 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
774 SND_SOC_DPCM_TRIGGER_PRE},
775 .dynamic = 1,
776 .dpcm_capture = 1,
777 SND_SOC_DAILINK_REG(capture6),
778 },
779 {
780 .name = "Capture_7",
781 .stream_name = "Capture_7",
782 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
783 SND_SOC_DPCM_TRIGGER_PRE},
784 .dynamic = 1,
785 .dpcm_capture = 1,
786 SND_SOC_DAILINK_REG(capture7),
787 },
788 {
789 .name = "Capture_8",
790 .stream_name = "Capture_8",
791 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
792 SND_SOC_DPCM_TRIGGER_PRE},
793 .dynamic = 1,
794 .dpcm_capture = 1,
795 SND_SOC_DAILINK_REG(capture8),
796 },
797 {
798 .name = "Capture_Mono_1",
799 .stream_name = "Capture_Mono_1",
800 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
801 SND_SOC_DPCM_TRIGGER_PRE},
802 .dynamic = 1,
803 .dpcm_capture = 1,
804 SND_SOC_DAILINK_REG(capture_mono1),
805 },
806 {
807 .name = "Capture_Mono_2",
808 .stream_name = "Capture_Mono_2",
809 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
810 SND_SOC_DPCM_TRIGGER_PRE},
811 .dynamic = 1,
812 .dpcm_capture = 1,
813 SND_SOC_DAILINK_REG(capture_mono2),
814 },
815 {
816 .name = "Capture_Mono_3",
817 .stream_name = "Capture_Mono_3",
818 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
819 SND_SOC_DPCM_TRIGGER_PRE},
820 .dynamic = 1,
821 .dpcm_capture = 1,
822 SND_SOC_DAILINK_REG(capture_mono3),
823 },
824 {
825 .name = "playback_hdmi",
826 .stream_name = "Playback_HDMI",
827 .trigger = {SND_SOC_DPCM_TRIGGER_PRE,
828 SND_SOC_DPCM_TRIGGER_PRE},
829 .dynamic = 1,
830 .dpcm_playback = 1,
831 SND_SOC_DAILINK_REG(playback_hdmi),
832 },
833 /* Back End DAI links */
834 {
835 .name = "Primary Codec",
836 .no_pcm = 1,
837 .dpcm_playback = 1,
838 .dpcm_capture = 1,
839 .ignore_suspend = 1,
840 .init = mt8192_mt6359_init,
841 SND_SOC_DAILINK_REG(primary_codec),
842 },
843 {
844 .name = "Primary Codec CH34",
845 .no_pcm = 1,
846 .dpcm_playback = 1,
847 .dpcm_capture = 1,
848 .ignore_suspend = 1,
849 SND_SOC_DAILINK_REG(primary_codec_ch34),
850 },
851 {
852 .name = "AP_DMIC",
853 .no_pcm = 1,
854 .dpcm_capture = 1,
855 .ignore_suspend = 1,
856 SND_SOC_DAILINK_REG(ap_dmic),
857 },
858 {
859 .name = "AP_DMIC_CH34",
860 .no_pcm = 1,
861 .dpcm_capture = 1,
862 .ignore_suspend = 1,
863 SND_SOC_DAILINK_REG(ap_dmic_ch34),
864 },
865 {
866 .name = "I2S0",
867 .no_pcm = 1,
868 .dpcm_capture = 1,
869 .ignore_suspend = 1,
870 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
871 SND_SOC_DAILINK_REG(i2s0),
872 },
873 {
874 .name = "I2S1",
875 .no_pcm = 1,
876 .dpcm_playback = 1,
877 .ignore_suspend = 1,
878 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
879 SND_SOC_DAILINK_REG(i2s1),
880 },
881 {
882 .name = "I2S2",
883 .no_pcm = 1,
884 .dpcm_capture = 1,
885 .ignore_suspend = 1,
886 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
887 SND_SOC_DAILINK_REG(i2s2),
888 },
889 {
890 .name = "I2S3",
891 .no_pcm = 1,
892 .dpcm_playback = 1,
893 .ignore_suspend = 1,
894 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
895 SND_SOC_DAILINK_REG(i2s3),
896 .ops = &mt8192_rt1015_i2s_ops,
897 },
898 {
899 .name = "I2S5",
900 .no_pcm = 1,
901 .dpcm_playback = 1,
902 .ignore_suspend = 1,
903 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
904 SND_SOC_DAILINK_REG(i2s5),
905 },
906 {
907 .name = "I2S6",
908 .no_pcm = 1,
909 .dpcm_capture = 1,
910 .ignore_suspend = 1,
911 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
912 SND_SOC_DAILINK_REG(i2s6),
913 },
914 {
915 .name = "I2S7",
916 .no_pcm = 1,
917 .dpcm_playback = 1,
918 .ignore_suspend = 1,
919 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
920 SND_SOC_DAILINK_REG(i2s7),
921 },
922 {
923 .name = "I2S8",
924 .no_pcm = 1,
925 .dpcm_capture = 1,
926 .ignore_suspend = 1,
927 .init = mt8192_rt5682_init,
928 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
929 SND_SOC_DAILINK_REG(i2s8),
930 .ops = &mt8192_rt5682_i2s_ops,
931 },
932 {
933 .name = "I2S9",
934 .no_pcm = 1,
935 .dpcm_playback = 1,
936 .ignore_suspend = 1,
937 .be_hw_params_fixup = mt8192_i2s_hw_params_fixup,
938 SND_SOC_DAILINK_REG(i2s9),
939 .ops = &mt8192_rt5682_i2s_ops,
940 },
941 {
942 .name = "CONNSYS_I2S",
943 .no_pcm = 1,
944 .dpcm_capture = 1,
945 .ignore_suspend = 1,
946 SND_SOC_DAILINK_REG(connsys_i2s),
947 },
948 {
949 .name = "PCM 1",
950 .no_pcm = 1,
951 .dpcm_playback = 1,
952 .dpcm_capture = 1,
953 .ignore_suspend = 1,
954 SND_SOC_DAILINK_REG(pcm1),
955 },
956 {
957 .name = "PCM 2",
958 .no_pcm = 1,
959 .dpcm_playback = 1,
960 .dpcm_capture = 1,
961 .ignore_suspend = 1,
962 SND_SOC_DAILINK_REG(pcm2),
963 },
964 {
965 .name = "TDM",
966 .no_pcm = 1,
967 .dpcm_playback = 1,
968 .ignore_suspend = 1,
969 SND_SOC_DAILINK_REG(tdm),
970 },
971};
972
973static struct snd_soc_codec_conf rt1015_amp_conf[] = {
974 {
975 .dlc = COMP_CODEC_CONF(RT1015_DEV0_NAME),
976 .name_prefix = "Left",
977 },
978 {
979 .dlc = COMP_CODEC_CONF(RT1015_DEV1_NAME),
980 .name_prefix = "Right",
981 },
982};
983
984static struct snd_soc_card mt8192_mt6359_rt1015_rt5682_soc_card = {
985 .name = "mt8192_mt6359_rt1015_rt5682",
986 .owner = THIS_MODULE,
987 .dai_link = mt8192_mt6359_rt1015_rt5682_dai_links,
988 .num_links = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_dai_links),
989 .controls = mt8192_mt6359_rt1015_rt5682_controls,
990 .num_controls = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_controls),
991 .dapm_widgets = mt8192_mt6359_rt1015_rt5682_widgets,
992 .num_dapm_widgets = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_widgets),
993 .dapm_routes = mt8192_mt6359_rt1015_rt5682_routes,
994 .num_dapm_routes = ARRAY_SIZE(mt8192_mt6359_rt1015_rt5682_routes),
995 .codec_conf = rt1015_amp_conf,
996 .num_configs = ARRAY_SIZE(rt1015_amp_conf),
997};
998
999static int mt8192_mt6359_rt1015_rt5682_dev_probe(struct platform_device *pdev)
1000{
1001 struct snd_soc_card *card = &mt8192_mt6359_rt1015_rt5682_soc_card;
1002 struct device_node *platform_node;
1003 int ret, i;
1004 struct snd_soc_dai_link *dai_link;
1005
1006 card->dev = &pdev->dev;
1007
1008 platform_node = of_parse_phandle(pdev->dev.of_node,
1009 "mediatek,platform", 0);
1010 if (!platform_node) {
1011 dev_err(&pdev->dev, "Property 'platform' missing or invalid\n");
1012 return -EINVAL;
1013 }
1014
1015 for_each_card_prelinks(card, i, dai_link) {
1016 if (!dai_link->platforms->name)
1017 dai_link->platforms->of_node = platform_node;
1018 }
1019
1020 ret = mt8192_afe_gpio_init(&pdev->dev);
1021 if (ret) {
1022 dev_err(&pdev->dev, "init gpio error %d\n", ret);
1023 return ret;
1024 }
1025
1026 return devm_snd_soc_register_card(&pdev->dev, card);
1027}
1028
1029#ifdef CONFIG_OF
1030static const struct of_device_id mt8192_mt6359_rt1015_rt5682_dt_match[] = {
1031 {.compatible = "mediatek,mt8192_mt6359_rt1015_rt5682",},
1032 {}
1033};
1034#endif
1035
1036static const struct dev_pm_ops mt8192_mt6359_rt1015_rt5682_pm_ops = {
1037 .poweroff = snd_soc_poweroff,
1038 .restore = snd_soc_resume,
1039};
1040
1041static struct platform_driver mt8192_mt6359_rt1015_rt5682_driver = {
1042 .driver = {
1043 .name = "mt8192_mt6359_rt1015_rt5682",
1044#ifdef CONFIG_OF
1045 .of_match_table = mt8192_mt6359_rt1015_rt5682_dt_match,
1046#endif
1047 .pm = &mt8192_mt6359_rt1015_rt5682_pm_ops,
1048 },
1049 .probe = mt8192_mt6359_rt1015_rt5682_dev_probe,
1050};
1051
1052module_platform_driver(mt8192_mt6359_rt1015_rt5682_driver);
1053
1054/* Module information */
1055MODULE_DESCRIPTION("MT8192-MT6359-RT1015-RT5682 ALSA SoC machine driver");
1056MODULE_AUTHOR("Jiaxin Yu <jiaxin.yu@mediatek.com>");
1057MODULE_LICENSE("GPL v2");
1058MODULE_ALIAS("mt8192_mt6359_rt1015_rt5682 soc card");