Gitiles
Code Review Sign In
review.shift-gmbh.com / SHIFTPHONES / mainline / linux / ec2212088c42ff7d1362629ec26dda4f3e8bdad3 / . / arch / arm / kernel / head-nommu.S
blob: d46f25968bec2ce04143daa785de6a63cf4b635b [file] [log] [blame]
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]1/*
2 * linux/arch/arm/kernel/head-nommu.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Common kernel startup code (non-paged MM)
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]12 *
13 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]14#include <linux/linkage.h>
15#include <linux/init.h>
16
17#include <asm/assembler.h>
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]18#include <asm/ptrace.h>
Uwe Zeisberger2eb9d312006-05-05 15:11:14 +0100[diff] [blame]19#include <asm/asm-offsets.h>
Hyok S. Choi3b920ce2006-04-24 09:45:35 +0100[diff] [blame]20#include <asm/thread_info.h>
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]21#include <asm/system.h>
22
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]23/*
24 * Kernel startup entry point.
25 * ---------------------------
26 *
27 * This is normally called from the decompressor code. The requirements
28 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
29 * r1 = machine nr.
30 *
31 * See linux/arch/arm/tools/mach-types for the complete list of machine
32 * numbers for r1.
33 *
34 */
Dave Martin540b5732011-07-13 15:53:30 +0100[diff] [blame]35 .arm
36
Tim Abbott2abc1c52009-10-02 16:32:46 -0400[diff] [blame]37 __HEAD
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]38ENTRY(stext)
Dave Martin540b5732011-07-13 15:53:30 +0100[diff] [blame]39
40 THUMB( adr r9, BSYM(1f) ) @ Kernel is always entered in ARM.
41 THUMB( bx r9 ) @ If this is a Thumb-2 kernel,
42 THUMB( .thumb ) @ switch to Thumb now.
43 THUMB(1: )
44
Catalin Marinasb86040a2009-07-24 12:32:54 +0100[diff] [blame]45 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]46 @ and irqs disabled
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]47#ifndef CONFIG_CPU_CP15
48 ldr r9, =CONFIG_PROCESSOR_ID
49#else
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]50 mrc p15, 0, r9, c0, c0 @ get processor id
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]51#endif
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]52 bl __lookup_processor_type @ r5=procinfo r9=cpuid
53 movs r10, r5 @ invalid processor (r5=0)?
54 beq __error_p @ yes, error 'p'
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]55
Catalin Marinasb86040a2009-07-24 12:32:54 +0100[diff] [blame]56 adr lr, BSYM(__after_proc_init) @ return (PIC) address
57 ARM( add pc, r10, #PROCINFO_INITFUNC )
58 THUMB( add r12, r10, #PROCINFO_INITFUNC )
59 THUMB( mov pc, r12 )
Catalin Marinas93ed3972008-08-28 11:22:32 +0100[diff] [blame]60ENDPROC(stext)
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]61
62/*
63 * Set the Control Register and Read the process ID.
64 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]65__after_proc_init:
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]66#ifdef CONFIG_CPU_CP15
Catalin Marinas05efde92009-07-24 12:34:59 +0100[diff] [blame]67 /*
68 * CP15 system control register value returned in r0 from
69 * the CPU init function.
70 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]71#ifdef CONFIG_ALIGNMENT_TRAP
72 orr r0, r0, #CR_A
73#else
74 bic r0, r0, #CR_A
75#endif
76#ifdef CONFIG_CPU_DCACHE_DISABLE
77 bic r0, r0, #CR_C
78#endif
79#ifdef CONFIG_CPU_BPREDICT_DISABLE
80 bic r0, r0, #CR_Z
81#endif
82#ifdef CONFIG_CPU_ICACHE_DISABLE
83 bic r0, r0, #CR_I
84#endif
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900[diff] [blame]85#ifdef CONFIG_CPU_HIGH_VECTOR
86 orr r0, r0, #CR_V
87#else
88 bic r0, r0, #CR_V
89#endif
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]90 mcr p15, 0, r0, c1, c0, 0 @ write control reg
Hyok S. Choif12d0d72006-09-26 17:36:37 +0900[diff] [blame]91#endif /* CONFIG_CPU_CP15 */
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]92
Russell Kingf131a082010-10-01 15:42:02 +0100[diff] [blame]93 b __mmap_switched @ clear the BSS and jump
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]94 @ to start_kernel
Catalin Marinas93ed3972008-08-28 11:22:32 +0100[diff] [blame]95ENDPROC(__after_proc_init)
Hyok S. Choi3b920ce2006-04-24 09:45:35 +0100[diff] [blame]96 .ltorg
Hyok S. Choi75d90832006-03-27 14:58:25 +0100[diff] [blame]97
98#include "head-common.S"