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Gregory CLEMENTe3e37bc2012-10-27 18:22:45 +02001/*
2 * Device Tree file for Globalscale Mirabox
3 *
4 * Gregory CLEMENT <gregory.clement@free-electrons.com>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11/dts-v1/;
Ezequiel Garcia38149882013-07-26 10:17:56 -030012#include "armada-370.dtsi"
Gregory CLEMENTe3e37bc2012-10-27 18:22:45 +020013
14/ {
15 model = "Globalscale Mirabox";
16 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17
18 chosen {
19 bootargs = "console=ttyS0,115200 earlyprintk";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x00000000 0x20000000>; /* 512 MB */
25 };
26
27 soc {
Ezequiel Garcia0cd37542013-07-26 10:17:58 -030028 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
Ezequiel Garcia5e12a612013-07-26 10:17:57 -030030
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020031 internal-regs {
32 serial@12000 {
33 clock-frequency = <200000000>;
34 status = "okay";
Ryan Press51ab3fb2013-03-28 19:10:24 -070035 };
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020036 timer@20300 {
37 clock-frequency = <600000000>;
Thomas Petazzoni488d1a62013-04-09 23:06:37 +020038 status = "okay";
39 };
40
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020041 pinctrl {
42 pwr_led_pin: pwr-led-pin {
43 marvell,pins = "mpp63";
44 marvell,function = "gpo";
45 };
46
47 stat_led_pins: stat-led-pins {
48 marvell,pins = "mpp64", "mpp65";
49 marvell,function = "gpio";
50 };
51 };
52
53 gpio_leds {
54 compatible = "gpio-leds";
55 pinctrl-names = "default";
56 pinctrl-0 = <&pwr_led_pin &stat_led_pins>;
57
58 green_pwr_led {
59 label = "mirabox:green:pwr";
60 gpios = <&gpio1 31 1>;
61 linux,default-trigger = "heartbeat";
62 };
63
64 blue_stat_led {
65 label = "mirabox:blue:stat";
66 gpios = <&gpio2 0 1>;
67 linux,default-trigger = "cpu0";
68 };
69
70 green_stat_led {
71 label = "mirabox:green:stat";
72 gpios = <&gpio2 1 1>;
73 default-state = "off";
74 };
75 };
76
77 mdio {
78 phy0: ethernet-phy@0 {
79 reg = <0>;
80 };
81
82 phy1: ethernet-phy@1 {
83 reg = <1>;
84 };
85 };
86 ethernet@70000 {
Thomas Petazzoni488d1a62013-04-09 23:06:37 +020087 status = "okay";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020088 phy = <&phy0>;
89 phy-mode = "rgmii-id";
90 };
91 ethernet@74000 {
92 status = "okay";
93 phy = <&phy1>;
94 phy-mode = "rgmii-id";
95 };
96
97 mvsdio@d4000 {
98 pinctrl-0 = <&sdio_pins3>;
99 pinctrl-names = "default";
100 status = "okay";
101 /*
102 * No CD or WP GPIOs: SDIO interface used for
103 * Wifi/Bluetooth chip
104 */
Simon Baatzd87b5fb2013-05-13 23:18:58 +0200105 broken-cd;
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200106 };
107
108 usb@50000 {
109 status = "okay";
110 };
111
112 usb@51000 {
113 status = "okay";
114 };
115
116 i2c@11000 {
117 status = "okay";
118 clock-frequency = <100000>;
119 pca9505: pca9505@25 {
120 compatible = "nxp,pca9505";
121 gpio-controller;
122 #gpio-cells = <2>;
123 reg = <0x25>;
124 };
125 };
126
127 pcie-controller {
128 status = "okay";
129
130 /* Internal mini-PCIe connector */
131 pcie@1,0 {
132 /* Port 0, Lane 0 */
133 status = "okay";
134 };
135
136 /* Connected on the PCB to a USB 3.0 XHCI controller */
137 pcie@2,0 {
138 /* Port 1, Lane 0 */
139 status = "okay";
140 };
Thomas Petazzoni488d1a62013-04-09 23:06:37 +0200141 };
142 };
Gregory CLEMENTe3e37bc2012-10-27 18:22:45 +0200143 };
144};