| commit | f8870ae6e2d6be75b1accc2db981169fdfbea7ab | [log] [tgz] |
|---|---|---|
| author | Adrian Hunter <adrian.hunter@intel.com> | Wed Feb 14 15:57:43 2018 +0200 |
| committer | Ulf Hansson <ulf.hansson@linaro.org> | Tue Feb 27 10:03:48 2018 +0100 |
| tree | 217bd38b934c9516a3007b8c63fd73773ad352b0 | |
| parent | 4a3928c6f8a53fa1aed28ccba227742486e8ddcb [diff] |
mmc: sdhci-pci: Fix S0i3 for Intel BYT-based controllers Tuning can leave the IP in an active state (Buffer Read Enable bit set) which prevents the entry to low power states (i.e. S0i3). Data reset will clear it. Generally tuning is followed by a data transfer which will anyway sort out the state, so it is rare that S0i3 is actually prevented. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>