| commit | f83c2609079cde0bb3ad4c1da60f9c69c0ec8920 | [log] [tgz] |
|---|---|---|
| author | Paul Cercueil <paul@crapouillou.net> | Sat Oct 10 21:25:09 2020 +0200 |
| committer | Linus Walleij <linus.walleij@linaro.org> | Wed Oct 28 16:50:43 2020 +0100 |
| tree | fe2f55a1f84e68d755e8db4160bb30e8e5b35b65 | |
| parent | 3650b228f83adda7e5ee532e2b90429c03f7b9ec [diff] |
pinctrl: ingenic: Fix invalid SSI pins
The values for the SSI pins on GPIO chips D and E were off by 0x20.
Fixes: d3ef8c6b2286 ("pinctrl: Ingenic: Add SSI pins support for JZ4770 and JZ4780.")
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reported-by: Artur Rojek <contact@artur-rojek.eu>
Link: https://lore.kernel.org/r/20201010192509.9098-1-paul@crapouillou.net
Reviewed-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>