| commit | efd00c722ca855745fcc35a7e6675b5a782a3fc8 | [log] [tgz] |
|---|---|---|
| author | Hanjun Guo <hanjun.guo@linaro.org> | Tue Mar 05 21:40:57 2019 +0800 |
| committer | Catalin Marinas <catalin.marinas@arm.com> | Tue Mar 19 14:55:10 2019 +0000 |
| tree | d560bc695fa0a43795df25e5fb602371036346a6 | |
| parent | c82fd1e6bd55ecc001e610e5484e292a7d8a39fc [diff] |
arm64: Add MIDR encoding for HiSilicon Taishan CPUs Adding the MIDR encodings for HiSilicon Taishan v110 CPUs, which is used in Kunpeng ARM64 server SoCs. TSV110 is the abbreviation of Taishan v110. Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by: John Garry <john.garry@huawei.com> Reviewed-by: Zhangshaokun <zhangshaokun@hisilicon.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>