| commit | ea41bd232f167d6fd6505d54485826148b52e54a | [log] [tgz] |
|---|---|---|
| author | chen gong <curry.gong@amd.com> | Fri Jan 29 15:37:45 2021 +0800 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Tue Feb 02 17:34:56 2021 -0500 |
| tree | 7856b5ca21cf47029bfbaf4b186b820838d3683c | |
| parent | b99a8c8f239d76820bbed33c1a42c381cc1f16db [diff] |
drm/amdgpu/gfx10: update CGTS_TCC_DISABLE and CGTS_USER_TCC_DISABLE register offsets for VGH For Vangogh: The offset of the CGTS_TCC_DISABLE is 0x5006 by calculation. The offset of the CGTS_USER_TCC_DISABLE is 0x5007 by calculation. Signed-off-by: chen gong <curry.gong@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>