commit | dbd6654329fcb0f5fc11d07997ddb61683c085f2 | [log] [tgz] |
---|---|---|
author | Przemyslaw Gaj <pgaj@cadence.com> | Mon Nov 18 16:01:14 2019 +0100 |
committer | Boris Brezillon <boris.brezillon@collabora.com> | Mon Dec 09 16:07:21 2019 +0100 |
tree | 53a2aaac4ac046ed269e115decc16c011af68d3f | |
parent | e42617b825f8073569da76dc4510bfa019b1c35a [diff] |
i3c: master: cdns: add data hold delay support This patch adds support for THD_DEL (Data Hold Delay) to Cadence I3C master constoller driver. As per MIPI I3C Specification 1.0, Table 75 (page 142) defines non-zero minimal tHD_PP timing on master output (Fig 65). This setting allows to meet this timing on master's soc outputs, regardless of PCB balancing. Signed-off-by: Przemyslaw Gaj <pgaj@cadence.com> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>