| commit | dae320ec31736865d22bfac78717726b6545ff41 | [log] [tgz] |
|---|---|---|
| author | Lokesh Vutla <lokeshvutla@ti.com> | Wed Feb 24 15:41:04 2016 +0530 |
| committer | Tony Lindgren <tony@atomide.com> | Mon Feb 29 15:02:15 2016 -0800 |
| tree | 727c00770423f7513af069014f376aa65eb89c0a | |
| parent | 4d91e285483bf6a93d84a483ec0921b86bbc3d24 [diff] |
ARM: dts: DRA7: change address-cells and size-cells DRA7 SoC has the capability to support DDR memory upto 4GB. In order to represent this in memory dt node, the address-cells and size cells should be 2. So, changing the address-cells and size-cells to 2 and updating the memory nodes accordingly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>