| commit | da5eb41763c750d1660ca0a962f15f268821b3e6 | [log] [tgz] |
|---|---|---|
| author | Charles Keepax <ckeepax@opensource.wolfsonmicro.com> | Tue Oct 25 16:42:30 2016 +0100 |
| committer | Mark Brown <broonie@kernel.org> | Tue Oct 25 20:13:49 2016 +0100 |
| tree | 5e3f83dfe405de34773c78da828964fab9c474ef | |
| parent | 1001354ca34179f3db924eb66672442a173147dc [diff] |
ASoC: cs42l56: Make ID registers volatile and remove cache bypass Rather than manually enabling cache bypass when reading the ID registers simply remove the default which will cause the first read to go to the hardware. The old code worked this is simply the more standard way to implement this. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Acked-by: Brian Austin <brian.austin@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org>