commit | 6d549ff55c3717c4f5b0202a22c7404395559cec | [log] [tgz] |
---|---|---|
author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | Sun Dec 08 19:05:25 2019 +0100 |
committer | Kevin Hilman <khilman@baylibre.com> | Wed Dec 11 11:26:27 2019 -0800 |
tree | 505108bd40921db61ea68c08c0e4f9b462e19734 | |
parent | c4ac5c37a4a5c5ce94f70542d006568bd4b7d685 [diff] |
ARM: dts: meson8b: add the DDR clock controller Add the DDR clock controller and pass it's DDR_CLKID_DDR_PLL to the main (HHI) clock controller as "ddr_clk". The "ddr_clk" is used as one of the inputs for the audio clock muxes. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>