| commit | d98793b5d4256faae76177178456214f55bc7083 | [log] [tgz] |
|---|---|---|
| author | Dave Jiang <dave.jiang@intel.com> | Tue Oct 27 14:34:09 2020 -0700 |
| committer | Vinod Koul <vkoul@kernel.org> | Fri Oct 30 14:10:27 2020 +0530 |
| tree | eb6dbed5e736cacda803600d6e2a519e517615b9 | |
| parent | 3650b228f83adda7e5ee532e2b90429c03f7b9ec [diff] |
dmaengine: idxd: fix wq config registers offset programming DSA spec v1.1 [1] updated to include a stride size register for WQ configuration that will specify how much space is reserved for the WQ configuration register set. This change is expected to be in the final gen1 DSA hardware. Fix the driver to use WQCFG_OFFSET() for all WQ offset calculation and fixup WQCFG_OFFSET() to use the new calculated wq size. [1]: https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators") Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/160383444959.48058.14249265538404901781.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>