tree 1e45f873258d93a4d8c999bc2b79fec331fb5ffe
parent f2d4f106f52068a33c4b65428f53a0b943e1236e
parent ca7d8b980b67f133317525c4273e144116ee1ae5
author Mark Brown <broonie@kernel.org> 1593642092 +0100
committer Mark Brown <broonie@kernel.org> 1593642092 +0100
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl79DGwTHGJyb29uaWVA
 a2VybmVsLm9yZwAKCRAk1otyXVSH0OI6B/91BwvOBRBfnkQrEs4p5nBB+O99qtC5
 dLYL8QRiV3i8iOMqdQyrMdpFrcRk0cAl52rmycVghgtd1Sf+6STEoBqDlINdQR1i
 JmTUTUoKg1DHVmKLwHeH/f80cTSOO3kB95Ld8Hdv0Ry4h0x47cHGNOlCf3tpzbri
 0nexde4lUq+rXSeo5irmgFjH346pW+yz1xVE4ZE6mJ0v2GP6oVgIxHdhYwBfCWQu
 zlX+EASuJ2sLl9cmQ45Rfitmok/9aspIvW0LzX4XQYV40mf1qEN42GNmeubNv7BH
 ds07qFo8PVt2XwHLij19SuqOgJG1pXPMhMskM2/mEj+t6Oc45e0/vIu/
 =usNe
 -----END PGP SIGNATURE-----

Merge series "Add Renesas RPC-IF support" from Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>:

Hello!

Here's a set of 2 patches against Linus' repo. Renesas Reduced Pin Count
Interface (RPC-IF) allows a SPI flash or HyperFlash connected to the SoC
to be accessed via the external address space read mode or the manual mode.
The memory controller driver for RPC-IF registers either SPI or HyperFLash
subdevice, depending on the contents of the device tree subnode; it also
provides the abstract "back end" API that can be used by the "front end"
SPI/MTD drivers to talk to the real hardware...

Based on the original patch by Mason Yang <masonccyang@mxic.com.tw>.

[1/2] dt-bindings: memory: document Renesas RPC-IF bindings
[2/2] memory: add Renesas RPC-IF driver

MBR, Sergei