commit | d85b82f09a03c2e1f06da740c6c47dd098b16ca5 | [log] [tgz] |
---|---|---|
author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | Mon Jul 12 20:44:20 2021 +0100 |
committer | Geert Uytterhoeven <geert+renesas@glider.be> | Mon Jul 19 11:22:10 2021 +0200 |
tree | 4ddd884442b1168e5abb05ebc60a4cc4db6d6021 | |
parent | d520af345189c04095bdd256d3601864601ac562 [diff] |
clk: renesas: r9a07g044: Add GPIO clock and reset entries Add GPIO clock and reset entries in CPG driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20210712194422.12405-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>