xtensa: fix ibreakenable register update
Only set the register when there is at least one ibreak register,
otherwise the build fails:
arch/xtensa/kernel/head.S:105: Error: invalid register 'ibreakenable'
for 'wsr' instruction
arch/xtensa/platforms/iss/setup.c:67: Error: invalid register
'ibreakenable' for 'wsr' instruction
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S
index df88f98..4566683 100644
--- a/arch/xtensa/kernel/head.S
+++ b/arch/xtensa/kernel/head.S
@@ -86,7 +86,9 @@
/* Clear debugging registers. */
#if XCHAL_HAVE_DEBUG
+#if XCHAL_NUM_IBREAK > 0
wsr a0, ibreakenable
+#endif
wsr a0, icount
movi a1, 15
wsr a0, icountlevel