| commit | c5e91ba25a65378edb013fbfe418b65d74f9aae5 | [log] [tgz] |
|---|---|---|
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | Thu Jan 21 11:06:16 2021 +0100 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Mon Jan 25 09:46:22 2021 +0100 |
| tree | a8124f9832cada3f1b5a068e5ed4b6867295689d | |
| parent | 6893a77279be77b8610f428985ba0f5fb7caebeb [diff] |
clk: renesas: r8a779a0: Add RAVB clocks Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210121100619.5653-3-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>