| commit | c52f4f839a33b1757aae25af41fc0037645e341c | [log] [tgz] |
|---|---|---|
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | Fri Mar 05 15:32:57 2021 +0100 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Wed Mar 10 10:48:57 2021 +0100 |
| tree | ca795577c8efb17114feb308ebb7838735cea32c | |
| parent | 429db43e84e3f99531a6184b05c4f1cd539da94b [diff] |
clk: renesas: r8a779a0: Add TMU clocks Also add CL16MCK source clock for TMU0. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20210305143259.12622-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>