V4L/DVB (8913): cx18: Create cx18_ specific wrappers for all pci mmio accessesors.
cx18: Create cx18_ specific wrappers for all pci mmio accessesors. This is a
first step in instrumenting all CX23418 PCI bus IO, to debug problems with
accessing the CX23418's PCI memory mapped IO.
Signed-off-by: Andy Walls <awalls@radix.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
diff --git a/drivers/media/video/cx18/cx18-i2c.c b/drivers/media/video/cx18/cx18-i2c.c
index 7d8fb25..aa09e55 100644
--- a/drivers/media/video/cx18/cx18-i2c.c
+++ b/drivers/media/video/cx18/cx18-i2c.c
@@ -22,6 +22,7 @@
*/
#include "cx18-driver.h"
+#include "cx18-io.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "cx18-av-core.h"
@@ -156,12 +157,12 @@
struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
- u32 r = read_reg(addr);
+ u32 r = cx18_read_reg(cx, addr);
if (state)
- write_reg_sync(r | SETSCL_BIT, addr);
+ cx18_write_reg_sync(cx, r | SETSCL_BIT, addr);
else
- write_reg_sync(r & ~SETSCL_BIT, addr);
+ cx18_write_reg_sync(cx, r & ~SETSCL_BIT, addr);
}
static void cx18_setsda(void *data, int state)
@@ -169,12 +170,12 @@
struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
- u32 r = read_reg(addr);
+ u32 r = cx18_read_reg(cx, addr);
if (state)
- write_reg_sync(r | SETSDL_BIT, addr);
+ cx18_write_reg_sync(cx, r | SETSDL_BIT, addr);
else
- write_reg_sync(r & ~SETSDL_BIT, addr);
+ cx18_write_reg_sync(cx, r & ~SETSDL_BIT, addr);
}
static int cx18_getscl(void *data)
@@ -183,7 +184,7 @@
int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
- return read_reg(addr) & GETSCL_BIT;
+ return cx18_read_reg(cx, addr) & GETSCL_BIT;
}
static int cx18_getsda(void *data)
@@ -192,7 +193,7 @@
int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
- return read_reg(addr) & GETSDL_BIT;
+ return cx18_read_reg(cx, addr) & GETSDL_BIT;
}
/* template for i2c-bit-algo */
@@ -392,29 +393,33 @@
cx->i2c_adap[i].dev.parent = &cx->dev->dev;
}
- if (read_reg(CX18_REG_I2C_2_WR) != 0x0003c02f) {
+ if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
/* Reset/Unreset I2C hardware block */
- write_reg(0x10000000, 0xc71004); /* Clock select 220MHz */
- write_reg_sync(0x10001000, 0xc71024); /* Clock Enable */
+ /* Clock select 220MHz */
+ cx18_write_reg(cx, 0x10000000, 0xc71004);
+ /* Clock Enable */
+ cx18_write_reg_sync(cx, 0x10001000, 0xc71024);
}
/* courtesy of Steven Toth <stoth@hauppauge.com> */
- write_reg_sync(0x00c00000, 0xc7001c);
+ cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c);
mdelay(10);
- write_reg_sync(0x00c000c0, 0xc7001c);
+ cx18_write_reg_sync(cx, 0x00c000c0, 0xc7001c);
mdelay(10);
- write_reg_sync(0x00c00000, 0xc7001c);
+ cx18_write_reg_sync(cx, 0x00c00000, 0xc7001c);
mdelay(10);
- write_reg_sync(0x00c00000, 0xc730c8); /* Set to edge-triggered intrs. */
- write_reg_sync(0x00c00000, 0xc730c4); /* Clear any stale intrs */
+ /* Set to edge-triggered intrs. */
+ cx18_write_reg_sync(cx, 0x00c00000, 0xc730c8);
+ /* Clear any stale intrs */
+ cx18_write_reg_sync(cx, 0x00c00000, 0xc730c4);
/* Hw I2C1 Clock Freq ~100kHz */
- write_reg_sync(0x00021c0f & ~4, CX18_REG_I2C_1_WR);
+ cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
/* Hw I2C2 Clock Freq ~100kHz */
- write_reg_sync(0x00021c0f & ~4, CX18_REG_I2C_2_WR);
+ cx18_write_reg_sync(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
@@ -428,8 +433,10 @@
{
int i;
CX18_DEBUG_I2C("i2c exit\n");
- write_reg(read_reg(CX18_REG_I2C_1_WR) | 4, CX18_REG_I2C_1_WR);
- write_reg(read_reg(CX18_REG_I2C_2_WR) | 4, CX18_REG_I2C_2_WR);
+ cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
+ CX18_REG_I2C_1_WR);
+ cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
+ CX18_REG_I2C_2_WR);
for (i = 0; i < 2; i++) {
i2c_del_adapter(&cx->i2c_adap[i]);