| commit | afdfd93a53aea68837b34da81d442358ff7552f3 | [log] [tgz] |
|---|---|---|
| author | Peter Collingbourne <pcc@google.com> | Tue Jul 13 18:36:38 2021 -0700 |
| committer | Catalin Marinas <catalin.marinas@arm.com> | Wed Jul 28 18:40:12 2021 +0100 |
| tree | fca4824cab040a175fa4513836edc6c07c9c6776 | |
| parent | 80c7c36fb3ddea8e06f75822bfb7634f64d0edcb [diff] |
arm64: mte: optimize GCR_EL1 modification on kernel entry/exit Accessing GCR_EL1 and issuing an ISB can be expensive on some microarchitectures. Although we must write to GCR_EL1, we can restructure the code to avoid reading from it because the new value can be derived entirely from the exclusion mask, which is already in a GPR. Do so. Signed-off-by: Peter Collingbourne <pcc@google.com> Link: https://linux-review.googlesource.com/id/I560a190a74176ca4cc5191dad08f77f6b1577c75 Link: https://lore.kernel.org/r/20210714013638.3995315-1-pcc@google.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>