drm/i915: Introduce crtc_state->update_planes bitmask
Keep track which planes need updating during the commit. For now
we set the bit for any plane that was or will be visible (including
icl+ nv12 slave planes). In the future I'll have need to update
invisible planes as well, for skl plane ddbs and for pre-skl pipe
gamma/csc control (which lives in the primary plane control register).
v2: Pimp the commit message to mention icl+ nv12 slave planes (Matt)
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181127163742.30215-1-ville.syrjala@linux.intel.com
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3516b3d..4469b45 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10839,8 +10839,10 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
continue;
plane_state->linked_plane = NULL;
- if (plane_state->slave && !plane_state->base.visible)
+ if (plane_state->slave && !plane_state->base.visible) {
crtc_state->active_planes &= ~BIT(plane->id);
+ crtc_state->update_planes |= BIT(plane->id);
+ }
plane_state->slave = false;
}
@@ -10881,6 +10883,7 @@ static int icl_check_nv12_planes(struct intel_crtc_state *crtc_state)
linked_state->slave = true;
linked_state->linked_plane = plane;
crtc_state->active_planes |= BIT(linked->id);
+ crtc_state->update_planes |= BIT(linked->id);
DRM_DEBUG_KMS("Using %s as Y plane for %s\n", linked->base.name, plane->base.name);
}