commit | a7c5047d1ce178dd2b1fa577fc8909ad663d56d5 | [log] [tgz] |
---|---|---|
author | Eric Anholt <eric@anholt.net> | Mon Feb 15 17:31:41 2016 -0800 |
committer | Eric Anholt <eric@anholt.net> | Fri Feb 26 17:42:47 2016 -0800 |
tree | a817f72b9d1334c67e92392bf0e9d426c14aab81 | |
parent | c31806fbdda910d337b60896040afa708bdfa2bd [diff] |
drm/vc4: Fix setting of vertical timings in the CRTC. It looks like when I went to add the interlaced bits, I just took the existing PV_VERT* block and indented it, instead of copy and pasting it first. Without this, changing resolution never worked. Signed-off-by: Eric Anholt <eric@anholt.net>