commit a232c8a12a0fe55a2e671d24626c98a21b57a332
author Arend van Spriel <arend@broadcom.com> Mon Dec 12 15:15:06 2011 -0800
committer John W. Linville <linville@tuxdriver.com> Tue Dec 13 15:48:16 2011 -0500
tree e1db75f926aa18c863284eb353b5176a8e787eda
parent 291ed3dcd5334c7987272494373751f86e5b61ee

brcm80211: smac: INTROFF/INTRESTORE macros removed

The macros were used to assure that the correct core was accessed in
the ISR, but register access is now done giving the explicit core so
no need to change interrupt state.

Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: Alwin Beukers <alwin@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Franky Lin <frankyl@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

drivers/net/wireless/brcm80211/brcmsmac/aiutils.c

diff --git a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
index 3d37b0a..3a78f5f 100644
--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
+++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
@@ -940,14 +940,11 @@
 	struct bcma_device *cc;
 	uint origidx = 0;
 	u32 w;
-	uint intr_val = 0;
 	struct si_info *sii;
 
 	sii = (struct si_info *)sih;
 	cc = sii->icbus->drv_cc.core;
 
-	INTR_OFF(sii, intr_val);
-
 	/* save current core index */
 	origidx = ai_coreidx(&sii->pub);
 
@@ -962,8 +959,6 @@
 	/* restore core index */
 	ai_setcoreidx(&sii->pub, origidx);
 
-	INTR_RESTORE(sii, intr_val);
-
 	return w;
 }
 
@@ -1086,13 +1081,10 @@
 	struct bcma_device *cc;
 	uint slowminfreq;
 	u16 fpdelay;
-	uint intr_val = 0;
 
 	sii = (struct si_info *)sih;
 	if (ai_get_cccaps(sih) & CC_CAP_PMU) {
-		INTR_OFF(sii, intr_val);
 		fpdelay = si_pmu_fast_pwrup_delay(sih);
-		INTR_RESTORE(sii, intr_val);
 		return fpdelay;
 	}
 
@@ -1100,18 +1092,12 @@
 		return 0;
 
 	fpdelay = 0;
-	INTR_OFF(sii, intr_val);
 	cc = ai_findcore(sih, CC_CORE_ID, 0);
-	if (cc == NULL)
-		goto done;
-
-
-	slowminfreq = ai_slowclk_freq(sih, false, cc);
-	fpdelay = (((bcma_read32(cc, CHIPCREGOFFS(pll_on_delay)) + 2) * 1000000)
-		   + (slowminfreq - 1)) / slowminfreq;
-
- done:
-	INTR_RESTORE(sii, intr_val);
+	if (cc) {
+		slowminfreq = ai_slowclk_freq(sih, false, cc);
+		fpdelay = (((bcma_read32(cc, CHIPCREGOFFS(pll_on_delay)) + 2)
+			    * 1000000) + (slowminfreq - 1)) / slowminfreq;
+	}
 	return fpdelay;
 }
 
@@ -1183,18 +1169,16 @@
 {
 	struct bcma_device *cc;
 	u32 scc;
-	uint intr_val = 0;
 
 	/* chipcommon cores prior to rev6 don't support dynamic clock control */
 	if (ai_get_ccrev(&sii->pub) < 6)
 		return false;
 
-	INTR_OFF(sii, intr_val);
 	cc = ai_findcore(&sii->pub, BCMA_CORE_CHIPCOMMON, 0);
 
 	if (!(ai_get_cccaps(&sii->pub) & CC_CAP_PWR_CTL) &&
 	    (ai_get_ccrev(&sii->pub) < 20))
-		goto done;
+		return mode == CLK_FAST;
 
 	switch (mode) {
 	case CLK_FAST:		/* FORCEHT, fast (pll) clock */
@@ -1248,8 +1232,6 @@
 		break;
 	}
 
- done:
-	INTR_RESTORE(sii, intr_val);
 	return mode == CLK_FAST;
 }