tree 45a53ba7c8c15393cd1d2e9e2a93251f8e7f248e
parent 7aff266552d6042b43d3d5a9b13f0009ef862033
author ABE Hiroshige <hiroshige.abe.zc@renesas.com> 1513259455 +0900
committer Geert Uytterhoeven <geert+renesas@glider.be> 1515147278 +0100

clk: renesas: r8a7796: Add FDP clock

This patch adds FDP1-0 clock to the R8A7796 SoC.

Signed-off-by: ABE Hiroshige <hiroshige.abe.zc@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: s/fdp0/fdp1-0/]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>