tree 0beeee242427fc8609f61f10c974cdc8fcdc399f
parent 8c41a7f3f7593fe57578f3f649232a5842d4c65d
author Gavin Shan <shangw@linux.vnet.ibm.com> 1371705670 +0800
committer Benjamin Herrenschmidt <benh@kernel.crashing.org> 1371711993 +1000

powerpc/eeh: I/O chip PE reset

The patch adds the I/O chip backend to do PE reset. For now, we
focus on PCI bus dependent PE. If PHB PE has been put into error
state, the PHB will take complete reset. Besides, the root bridge
will take fundamental or hot reset accordingly if the indicated
PE locates at the toppest of PCI hierarchy tree. Otherwise, the
upstream p2p bridge will take hot reset.

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>