commit | 9a20b09285bbd75ccc2ca78233241f8e31d54a28 | [log] [tgz] |
---|---|---|
author | Maciej W. Rozycki <macro@linux-mips.org> | Wed May 27 14:15:20 2015 +0100 |
committer | Ralf Baechle <ralf@linux-mips.org> | Sun Jun 21 21:52:41 2015 +0200 |
tree | f18914b5a7e902428a14a9b58025d64ff950d64e | |
parent | 3bcb03f3a7160e411c5f335028a5c70b32f0edb7 [diff] |
MIPS: tlb-r3k: Optimise a TLBWI barrier in TLB invalidation Replace an explicit barrier with a useful processor instruction in TLB invalidation, following several other such cases elsewhere in `tlb-r3k.c'. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/10196/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>