| commit | 8dc4af8bef127425271e06d09370a2479dae69c3 | [log] [tgz] |
|---|---|---|
| author | Claudiu Beznea <claudiu.beznea@microchip.com> | Thu Nov 19 17:43:12 2020 +0200 |
| committer | Stephen Boyd <sboyd@kernel.org> | Sat Dec 19 11:50:55 2020 -0800 |
| tree | 63114c00b05016b1744a70d8380db17e0e911087 | |
| parent | 0bb4623f13d46b2ea054777accff0c41af8036be [diff] |
clk: at91: clk-sam9x60-pll: allow runtime changes for pll Allow runtime frequency changes for PLLs registered with proper flags. This is necessary for CPU PLL on SAMA7G5 which is used by DVFS. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/1605800597-16720-7-git-send-email-claudiu.beznea@microchip.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>