drm/i915/xelpd: Enhanced pipe underrun reporting
XE_LPD brings enhanced underrun recovery: the hardware can somewhat
mitigate underruns by using an interpolated replacement pixel (soft
underrun) or the previous pixel (hard underrun). Furthermore, underruns
can now be caused downstream by the port, even if the pipe itself is
operating properly. The interrupt register and PIPE_STATUS register
give us extra bits to recognize hard/soft underruns and determine
whether the underrun was caused by the port, so we'll use that
information to print some more descriptive errors when underruns occur.
v2:
- Keep ICL's PIPE_STATUS defined separately from the old GMCH pipe
status register. (Ville)
- Only read/clear the PIPE_STATUS register on platforms with
display ver >= 11. (Lucas)
v3:
- Actually enable+unmask all the new underrun interrupts, clear stale
bits out from PIPE_STATUS before enabling the interrupts, report all
FIFO underruns errors at once, rename a bunch of stuff to unconfuse
vs. PIPESTAT. (Ville)
Bspec: 50335
Bspec: 50366
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526000656.3060314-2-matthew.d.roper@intel.com
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d4debb3e..c775a6d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6168,6 +6168,13 @@ enum {
#define SKL_BOTTOM_COLOR_CSC_ENABLE (1 << 30)
#define SKL_BOTTOM_COLOR(pipe) _MMIO_PIPE2(pipe, _SKL_BOTTOM_COLOR_A)
+#define _ICL_PIPE_A_STATUS 0x70058
+#define ICL_PIPESTATUS(pipe) _MMIO_PIPE2(pipe, _ICL_PIPE_A_STATUS)
+#define PIPE_STATUS_UNDERRUN REG_BIT(31)
+#define PIPE_STATUS_SOFT_UNDERRUN_XELPD REG_BIT(28)
+#define PIPE_STATUS_HARD_UNDERRUN_XELPD REG_BIT(27)
+#define PIPE_STATUS_PORT_UNDERRUN_XELPD REG_BIT(26)
+
#define VLV_DPFLIPSTAT _MMIO(VLV_DISPLAY_BASE + 0x70028)
#define PIPEB_LINE_COMPARE_INT_EN (1 << 29)
#define PIPEB_HLINE_INT_EN (1 << 28)
@@ -7849,6 +7856,8 @@ enum {
#define GEN8_PIPE_FIFO_UNDERRUN (1 << 31)
#define GEN8_PIPE_CDCLK_CRC_ERROR (1 << 29)
#define GEN8_PIPE_CDCLK_CRC_DONE (1 << 28)
+#define XELPD_PIPE_SOFT_UNDERRUN (1 << 22)
+#define XELPD_PIPE_HARD_UNDERRUN (1 << 21)
#define GEN8_PIPE_CURSOR_FAULT (1 << 10)
#define GEN8_PIPE_SPRITE_FAULT (1 << 9)
#define GEN8_PIPE_PRIMARY_FAULT (1 << 8)