| commit | 89aa94b4a218339b08f052a28c55322d5a13fc9e | [log] [tgz] |
|---|---|---|
| author | Huang Rui <ray.huang@amd.com> | Fri Dec 24 09:04:56 2021 +0800 |
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | Thu Dec 30 18:51:17 2021 +0100 |
| tree | 99eb9e4b1a3a6c5b7f7663f849d4d7e10f031842 | |
| parent | d341db8f48ea43314f489921962c7f8f4ec27239 [diff] |
x86/msr: Add AMD CPPC MSR definitions AMD CPPC (Collaborative Processor Performance Control) function uses MSR registers to manage the performance hints. So add the MSR register macro here. Signed-off-by: Huang Rui <ray.huang@amd.com> Acked-by: Borislav Petkov <bp@suse.de> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>