| commit | b1f2f6f3cf5e37f0418f6cebf365cff7c3abf6d7 | [log] [tgz] |
|---|---|---|
| author | Noam Camus <noamc@ezchip.com> | Fri Apr 10 21:28:50 2015 +0300 |
| committer | Vineet Gupta <vgupta@synopsys.com> | Mon May 09 09:32:33 2016 +0530 |
| tree | d9a8d9d4d37ed7cbe7f098993c3856c756666d18 | |
| parent | a5a10d99a946602cf4ae50eadc65c2480dbd2e56 [diff] |
ARC: [plat-eznps] Use dedicated SMP barriers NPS device got 256 cores and each got 16 HW threads (SMT). We use EZchip dedicated ISA to trigger HW scheduler of the core that current HW thread belongs to. This scheduling makes sure that data beyond barrier is available to all HW threads in core and by that to all in device (4K). Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Peter Zijlstra <peterz@infradead.org>