Opteron revision F will support higher frequencies than
can be encoded in the current driver's 4 bit frequency
field. This patch updates the driver to support Rev F
including 6 bit FIDs and processor ID updates.
This should apply cleanly whether or not the dual-core
bugfix I sent out last week is applied. I'd prefer
that both get applied, of course.
Signed-off-by: David Keck <david.keck@amd.com>
Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
index 9cf7b67b..7fe5b2a 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
@@ -1,5 +1,5 @@
/*
- * (c) 2003, 2004 Advanced Micro Devices, Inc.
+ * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
* Your use of this code is subject to the terms and conditions of the
* GNU general public license version 2. See "COPYING" or
* http://www.gnu.org/licenses/gpl.html
@@ -44,7 +44,7 @@
#define PFX "powernow-k8: "
#define BFX PFX "BIOS error: "
-#define VERSION "version 1.40.4"
+#define VERSION "version 1.50.3"
#include "powernow-k8.h"
/* serialize freq changes */
@@ -232,7 +232,7 @@
/*
* Reduce the vid by the max of step or reqvid.
* Decreasing vid codes represent increasing voltages:
- * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of 0x1f is off.
+ * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
*/
static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
{
@@ -467,7 +467,7 @@
eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
- ((eax & CPUID_XMOD) > CPUID_XMOD_REV_E)) {
+ ((eax & CPUID_XMOD) > CPUID_XMOD_REV_F)) {
printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
goto out;
}
@@ -696,6 +696,7 @@
data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
+ data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
@@ -735,8 +736,13 @@
}
for (i = 0; i < data->acpi_data.state_count; i++) {
- u32 fid = data->acpi_data.states[i].control & FID_MASK;
- u32 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
+ if (data->exttype) {
+ u32 fid = data->acpi_data.states[i].status & FID_MASK;
+ u32 vid = (data->acpi_data.states[i].status >> VID_SHIFT) & VID_MASK;
+ } else {
+ u32 fid = data->acpi_data.states[i].control & FID_MASK;
+ u32 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
+ }
dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
@@ -753,7 +759,7 @@
}
/* verify voltage is OK - BIOSs are using "off" to indicate invalid */
- if (vid == 0x1f) {
+ if (vid == VID_OFF) {
dprintk("invalid vid %u, ignoring\n", vid);
powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
continue;
@@ -930,15 +936,6 @@
down(&fidvid_sem);
- for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
- /* make sure the sibling is initialized */
- if (!powernow_data[i]) {
- ret = 0;
- up(&fidvid_sem);
- goto err_out;
- }
- }
-
powernow_k8_acpi_pst_values(data, newstate);
if (transition_frequency(data, newstate)) {