add delay around sl82c105_reset_engine calls
The hald media changed polling does really confuse things.
Noone knows why the delays are needed, but they give us access to the CD.
An udelay(50) will give reliable access to the drive, but there is still
one (or more) EH reset. The drive works without EH resets with udelay(100).
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index f2fa158..96e890f 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -187,7 +187,9 @@
{
struct ata_port *ap = qc->ap;
+ udelay(100);
sl82c105_reset_engine(ap);
+ udelay(100);
/* Set the clocks for DMA */
sl82c105_configure_dmamode(ap, qc->dev);
@@ -216,6 +218,7 @@
ata_bmdma_stop(qc);
sl82c105_reset_engine(ap);
+ udelay(100);
/* This will redo the initial setup of the DMA device to matching
PIO timings */