drm/i915: Move load time shrinker registration later
According to the new init phases scheme we should register the driver
with frameworks/userspace only one the device is setup fully. So move
the shrinker registration later accordingly.
Also fix the shrinker unregistration order wrt. the acpi unregistration
to fix the corresponding init order.
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1458128348-15730-10-git-send-email-imre.deak@intel.com
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index a07e359..2d279a6 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1117,8 +1117,6 @@
i915_gem_load_init_fences(dev_priv);
- i915_gem_shrinker_init(dev_priv);
-
/* On the 945G/GM, the chipset reports the MSI capability on the
* integrated graphics even though the support isn't actually there
* according to the published specs. It doesn't appear to function
@@ -1138,7 +1136,7 @@
if (INTEL_INFO(dev)->num_pipes) {
ret = drm_vblank_init(dev, INTEL_INFO(dev)->num_pipes);
if (ret)
- goto out_cleanup_shrinker;
+ goto out_disable_msi;
}
ret = i915_load_modeset_init(dev);
@@ -1147,6 +1145,7 @@
goto out_power_well;
}
+ i915_gem_shrinker_init(dev_priv);
/*
* Notify a valid surface after modesetting,
* when running inside a VM.
@@ -1176,9 +1175,7 @@
out_power_well:
intel_power_domains_fini(dev_priv);
drm_vblank_cleanup(dev);
-out_cleanup_shrinker:
- i915_gem_shrinker_cleanup(dev_priv);
-
+out_disable_msi:
if (dev->pdev->msi_enabled)
pci_disable_msi(dev->pdev);
@@ -1223,12 +1220,11 @@
i915_teardown_sysfs(dev);
- i915_gem_shrinker_cleanup(dev_priv);
-
io_mapping_free(dev_priv->gtt.mappable);
arch_phys_wc_del(dev_priv->gtt.mtrr);
acpi_video_unregister();
+ i915_gem_shrinker_cleanup(dev_priv);
drm_vblank_cleanup(dev);