| commit | 7c4163aae3d8e5b9bd72508f542a44d707f308b5 | [log] [tgz] |
|---|---|---|
| author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | Mon Jun 13 00:06:52 2016 +0300 |
| committer | Simon Horman <horms+renesas@verge.net.au> | Thu Jun 16 09:25:20 2016 +0900 |
| tree | d32e29063e7fdd412ca3780f499f86c1f29b0d0c | |
| parent | 5258bb5d980024dae22f4256329caec4fe5e98b3 [diff] |
ARM: dts: r8a7792: initial SoC device tree The initial R8A7792 SoC device tree including CPU cores, GIC, timer, SYSC, and the required clock descriptions. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>