commit | 7ab0760f5178169c4c218852f51646ea90817d7c | [log] [tgz] |
---|---|---|
author | Vasundhara Volam <vasundhara-v.volam@broadcom.com> | Fri Oct 13 21:09:31 2017 -0400 |
committer | David S. Miller <davem@davemloft.net> | Sat Oct 14 18:51:51 2017 -0700 |
tree | 38e74fb45b6c61b825d70599e42c9cf0390c7fbc | |
parent | e2dc9b6e38fa3919e63d6d7905da70ca41cbf908 [diff] |
bnxt_en: Fix VF PCIe link speed and width logic. PCIE PCIE_EP_REG_LINK_STATUS_CONTROL register is only defined in PF config space, so we must read it from the PF. Fixes: 90c4f788f6c0 ("bnxt_en: Report PCIe link speed and width during driver load") Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>