| commit | 74124439b93065c35b840f381bb26f61452c18e5 | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Thu Jan 21 13:26:38 2016 +0800 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Mon Jan 25 00:01:21 2016 +0100 |
| tree | dc33b4ce4eb5b7c9de4938de56558d6d84327a1b | |
| parent | db30fce1eea58e50ae8b2722704b4f529c394dba [diff] |
ARM: dts: sun8i: sina33: Enable hardware reset and HS-DDR for eMMC mmc2 has a special pin for eMMC hardware reset, which is controllable from the controller. Add the "mmc-cap-hw-reset" property to denote that this controller supports this function, and the pins are actually used. Also increase the signal drive strength for mmc2 pins, for HS-DDR mode support. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>