tree 9e5250eedeaed30eafa44dbb1b9a56201948ed10
parent 9e6f3b44dc75666bd1861f49aea0f8dfa8c67499
author Dirk Behme <dirk.behme@de.bosch.com> 1580714940 +0100
committer Geert Uytterhoeven <geert+renesas@glider.be> 1581339890 +0100

clk: renesas: r8a7796: Add RPC clocks

Describe the RPCSRC internal clock and the RPC[D2] clocks derived from
it, as well as the RPC-IF module clock, in the R-Car M3-W/M3-W+
(R8A7796) CPG/MSSR driver.

Inspired by commit 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks").

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Link: https://lore.kernel.org/r/20200203072901.31548-2-dirk.behme@de.bosch.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>