| commit | 70421257c068b91476e70cade15fca68045d0693 | [log] [tgz] |
|---|---|---|
| author | Marcus Cooper <codekipper@gmail.com> | Tue Dec 20 11:44:46 2016 +0100 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Mon Jan 02 22:24:55 2017 +0100 |
| tree | 7745d2742b1e803ffdc3676136701d46c01714d0 | |
| parent | bb021cda2ccf45ee9470bf0f8c55323ad1c761ae [diff] |
clk: sunxi-ng: A31: Fix spdif clock register As the SPDIF was rarely documented on the earlier Allwinner SoCs it was assumed that it had a similar clock register to the one described in the H3 User Manual. However this is not the case and it looks to shares the same setup as the I2S clock registers. Signed-off-by: Marcus Cooper <codekipper@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>