mfd: sec: Add register cache for interrupt mask registers
The performance of regmap-irq is improved if the interrupt mask registers
can be cached since it does read/modify/update cycles so start using the
register cache infrastructure for those registers. We should use this more
widely but I don't have a datasheet and this is a nice, conservative
starting point.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index e493001..79c0750 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -106,6 +106,31 @@
}
EXPORT_SYMBOL_GPL(sec_reg_update);
+static bool s2mps11_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case S2MPS11_REG_INT1M:
+ case S2MPS11_REG_INT2M:
+ case S2MPS11_REG_INT3M:
+ return false;
+ default:
+ return true;
+ }
+}
+
+static bool s5m8763_volatile(struct device *dev, unsigned int reg)
+{
+ switch (reg) {
+ case S5M8763_REG_IRQM1:
+ case S5M8763_REG_IRQM2:
+ case S5M8763_REG_IRQM3:
+ case S5M8763_REG_IRQM4:
+ return false;
+ default:
+ return true;
+ }
+}
+
static struct regmap_config sec_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -116,6 +141,8 @@
.val_bits = 8,
.max_register = S2MPS11_REG_L38CTRL,
+ .volatile_reg = s2mps11_volatile,
+ .cache_type = REGCACHE_FLAT,
};
static struct regmap_config s5m8763_regmap_config = {
@@ -123,6 +150,8 @@
.val_bits = 8,
.max_register = S5M8763_REG_LBCNFG2,
+ .volatile_reg = s5m8763_volatile,
+ .cache_type = REGCACHE_FLAT,
};
static struct regmap_config s5m8767_regmap_config = {
@@ -130,6 +159,8 @@
.val_bits = 8,
.max_register = S5M8767_REG_LDO28CTRL,
+ .volatile_reg = s2mps11_volatile,
+ .cache_type = REGCACHE_FLAT,
};
#ifdef CONFIG_OF