| commit | 69a87f290b46228c2ff1cc942326a90c468a2a68 | [log] [tgz] |
|---|---|---|
| author | Linus Walleij <linus.walleij@linaro.org> | Mon Feb 12 22:40:23 2018 +0100 |
| committer | Linus Walleij <linus.walleij@linaro.org> | Tue Feb 13 08:17:45 2018 +0100 |
| tree | 03be5e58ef91c375436c590e27a19fccb317ae83 | |
| parent | 3c87d7c874b2119c1cff4eee5586b9a6bc0b7fe9 [diff] |
gpio: ftgpio010: Fix some more registers There is a register for "bypass" which seems to not be used for anything in some silicon designs, but may be used in others, and there is both a raw and masked interrupt status register. Define them all for clarity, no semantic changes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>