| commit | 67daf1186086ad4b2ec09b8078b835936977d06a | [log] [tgz] |
|---|---|---|
| author | Shay Agroskin <shayag@mellanox.com> | Sun Sep 30 09:58:08 2018 +0300 |
| committer | Saeed Mahameed <saeedm@mellanox.com> | Thu Oct 18 13:32:36 2018 -0700 |
| tree | ff53fc579a93060e56ac30500a964e5187431d2f | |
| parent | 6cfa94605091b65cb2895a826750a30fbed99770 [diff] |
net/mlx5: Added "per_lane_error_counters" cap bit to PCAM Added "Per lane raw errors" capability bit in Ports Capabilities Mask (PCAM) enhanced features layout. This bit determines if the fields "phy_raw_errors_laneX" in "Physical Layer statistical" counters group are supported. Signed-off-by: Shay Agroskin <shayag@mellanox.com> Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>