tree e11c2aa50129bbcbc4e9eb39bf00bbfd63891df3
parent 88c9a65e13f393fd60d8b9e9c659a34f9e39967d
author Stephane Eranian <eranian@google.com> 1328826057 +0100
committer Ingo Molnar <mingo@elte.hu> 1330955741 +0100

perf/x86: Implement PERF_SAMPLE_BRANCH for Intel CPUs

This patch implements PERF_SAMPLE_BRANCH support for Intel
x86processors. It connects PERF_SAMPLE_BRANCH to the actual LBR.

The patch adds the hooks in the PMU irq handler to save the LBR
on counter overflow for both regular and PEBS modes.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-8-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>