commit | 5c1c63f6345b9e1600875f3122166c0af434158e | [log] [tgz] |
---|---|---|
author | Xing Zheng <zhengxing@rock-chips.com> | Fri Oct 21 12:03:40 2016 +0800 |
committer | Heiko Stuebner <heiko@sntech.de> | Fri Oct 21 09:34:19 2016 +0200 |
tree | 80e6471ee2c5dfebca74bbb7d4f90624cc03de00 | |
parent | 1001354ca34179f3db924eb66672442a173147dc [diff] |
clk: rockchip: add 533.25MHz to rk3399 clock rates table We need to get the accurate 533.25MHz for the DP display. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>