commit | 5868491e1257786628fdd2457dfb77609f49f91d | [log] [tgz] |
---|---|---|
author | Johan Jonker <jbx6244@gmail.com> | Wed Nov 18 14:58:16 2020 +0100 |
committer | Heiko Stuebner <heiko@sntech.de> | Sun Nov 29 20:10:44 2020 +0100 |
tree | e5bfd293c079db123d47de750d07221e347f542a | |
parent | 7f5b57a095f3b9532793d143655e83433bb448af [diff] |
clk: rockchip: add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks Add CLK_SET_RATE_PARENT to sclk for rk3066a i2s and uart clocks, so that the parent COMPOSITE_FRACMUX and COMPOSITE_NOMUX also update. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20201118135822.9582-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>