kbuild: split cc-option and friends to scripts/Makefile.compiler
scripts/Kbuild.include is included everywhere, but macros such as
cc-option are needed by build targets only.
For example, when 'make clean' traverses the tree, it does not need
to evaluate $(call cc-option,).
Split cc-option, ld-option, etc. to scripts/Makefile.compiler, which
is only included from the top Makefile and scripts/Makefile.build.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
diff --git a/Makefile b/Makefile
index 93e6e2d2..80bae8a 100644
--- a/Makefile
+++ b/Makefile
@@ -584,6 +584,10 @@
export CLANG_FLAGS
endif
+# Include this also for config targets because some architectures need
+# cc-cross-prefix to determine CROSS_COMPILE.
+include $(srctree)/scripts/Makefile.compiler
+
ifdef config-build
# ===========================================================================
# *config targets only - make sure prerequisites are updated, and descend